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SLOS278D − JANUARY 2000 − REVISED NOVEMBER 2002
19
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
crest factor and thermal considerations (continued)
To calculate maximum ambient temperatures, first consider that the numbers from the dissipation graphs are
per channel so the dissipated power needs to be doubled for two channel operation. Given Θ
JA
, the maximum
allowable junction temperature, and the total internal dissipation, the maximum ambient temperature can be
calculated with the following equation. The maximum recommended junction temperature for the TPA0233 is
150°C. The internal dissipation figures are taken from the Power Dissipation vs Output Power graphs.
T
A
Max + T
J
Max * Θ
JA
P
D
+ 150 * 58.48
(
0.8 2
)
+ 56°C
(
15-dB crest factor
)
(15)
NOTE:
Internal dissipation of 0.8 W is estimated for a 2-W system with 15-dB crest factor per channel.
Tables 3 and 4 show that for some applications no airflow is required to keep junction temperatures in the
specified range. The TPA0233 is designed with thermal protection that turns the device off when the junction
temperature surpasses 150°C to prevent damage to the IC. Tables 3 and 4 were calculated for maximum
listening volume without distortion. When the output level is reduced the numbers in the table change
significantly. Also, using 8- speakers dramatically increases the thermal performance by increasing amplifier
efficiency.
ST/MN (stereo/mono) operation
The ability of the TPA0233 to easily switch between mono BTL and stereo SE modes is one of its most important
cost saving features. This feature eliminates the requirement for an additional headphone amplifier in
applications where an internal speaker is driven in BTL mode but external stereo headphone or speakers must
be accommodated. When ST/MN
is held high, the RIN and LIN inputs drive the output as Lo and Ro in stereo
SE mode. When ST/MN
is held low, the inputs are summed internally and the output is driven as Mo+ and Mo−
in mono BTL mode. Control of the ST/MN
input can be from a logic-level CMOS source or, more typically, from
a switch-controlled resistor divider network as shown in the functional block diagram.

TPA0223DGQ 数据手册

TI(德州仪器)
27 页 / 0.8 MByte

TPA0223 数据手册

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