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VIA to GND Plane
D2+
D2-
D1+
D1-
D0+
D0-
Clk+
Clk-
D1-
D1+
D0+
D0-
NC
NC
NC
NC
GND
GND
NC
NC
NC
NC
GND
NC
NC
NC
NC
D1-
D1+
D0+
D0-
GND
TPD1E05U06
,
TPD4E05U06
,
TPD6E05U06
www.ti.com
SLVSBO7I DECEMBER 2012REVISED JULY 2015
10 Layout
10.1 Layout Guidelines
The optimum placement is as close to the connector as possible.
EMI during an ESD event can couple from the trace being struck to other nearby unprotected traces,
resulting in early system failures.
The PCB designer needs to minimize the possibility of EMI coupling by keeping any unprotected traces
away from the protected traces which are between the TVS and the connector.
Route the protected traces as straight as possible.
Eliminate any sharp corners on the protected traces between the TVS and the connector by using rounded
corners with the largest radii possible.
Electric fields tend to build up on corners, increasing EMI coupling.
10.2 Layout Example
10.2.1 TPD4E05U06 Layout Example
This application is typical of an HDMI 1.4 layout.
Figure 24. TPD4E05U06 Layout
Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: TPD1E05U06 TPD4E05U06 TPD6E05U06

TPD1E05U06DPYR 数据手册

TI(德州仪器)
28 页 / 1.51 MByte
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185 页 / 1.44 MByte
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TPD1E05U06 数据手册

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