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TWL1200ZQCR 数据手册 - TI（德州仪器）
制造商:
TI（德州仪器）
分类:
电压电平转换器
封装:
BGA-48
描述:
SDIO ， UART和音频电压转换收发器 SDIO, UART, AND AUDIO VOLTAGE-TRANSLATION TRANSCEIVER
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
典型应用电路图在P4P5P20
原理图在P5
封装尺寸在P2P27P28P30P31
型号编码规则在P2
标记信息在P2P28
封装信息在P2P28P29P30P31
技术参数、封装参数在P6
应用领域在P25P34
电气规格在P8P9
导航目录
TWL1200ZQCR数据手册
Page:
of 34 Go
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TWL1200
SCES786A –JUNE 2009–REVISED NOVEMBER 2009
www.ti.com
DESCRIPTION/ORDERING INFORMATION
The TWL1200 is an 19-bit voltage translator specifically designed to seamlessly bridge the 1.8-V/2.6-V
digital-switching compatibility gap between 2.6-V baseband and the TI Wi-Link-6 (WL1271/3). It is optimized for
SDIO, UART, and audio functions. The TWL1200 has two supply-voltage pins, V
CCA
and V
CCB
, that can be
operated over the full range of 1.1 V to 3.6 V. The TWL1200 enables system designers to easily interface
applications processors or digital basebands to peripherals operating at a different I/O voltage levels, such as the
TI Wi-Link-6 (WL1271/3) or other SDIO/memory cards.
The TWL1200 is offered in both 48-ball 0.5-mm ball grid array (BGA) and 49-bump 0.4-mm wafer chip scale
package (WCSP) packages. Low static power consumption and small package size make the TWL1200 an ideal
choice for mobile-phone applications.
ORDERING INFORMATION
(1)
ORDERABLE
T
A
PACKAGE
(2)
TOP-SIDE MARKING
PART NUMBER
BGA MicroStar Junior™ – ZQC (Pb-free) Tape and reel TWL1200ZQCR YW200
–40°C to 85°C
WCSP ™ – YFF (Pb-free) Tape and reel TWL1200YFFR YW200
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
TERMINAL FUNCTIONS
TERMINAL
ZQC YFF
TYPE DESCRIPTION
BALL BUMP NAME
NO. NO.
C4, D4 C4, D4 V
CCA
Power A-side supply voltage (1.1 V to 3.6 V)
B2 B2 SDIO_DATA0(A) I/O Data bit 1 connected to baseband SDIO controller
C2 C2 SDIO_DATA1(A) I/O Data bit 2 connected to baseband SDIO controller
C1 C1 SDIO_DATA2(A) I/O Data bit 3 connected to baseband SDIO controller
B1 B1 SDIO_DATA3(A) I/O Data bit 4 connected to baseband SDIO controller
A2 A2 SDIO_CMD(A) I/O Command bit connected to baseband SDIO controller. Referenced to V
CCA
.
Command bit connected to SD/SDIO peripheral. Includes a 15-kΩ pullup resistor
A6 A6 SDIO_CMD(B) I/O
to V
CCB
.
D3, E3, D3, E3,
GND Ground
E4, E5 E4, E5
B6 B6 SDIO_DATA0(B) I/O Data bit 1 connected to SD/SDIO peripheral
C6 C6 SDIO_DATA1(B) I/O Data bit 2 connected to SD/SDIO peripheral
C7 C7 SDIO_DATA2(B) I/O Data bit 3 connected to SD/SDIO peripheral
B7 B7 SDIO_DATA3(B) I/O Data bit 4 connected to SD/SDIO peripheral
A1 A1 SDIO_CLK(A) I Clock signal connected to baseband SDIO controller. Referenced to V
CCA
.
Clock signal connected to SD/SDIO peripheral. Referenced to V
CCB
; drive
A7 A7 SDIO_CLK(B) O
strength = 8 mA
C5, D5 C5, D5 V
CCB
Pwr B-side supply voltage (1.1 V to 3.6 V)
C3 C3 – – No ball (for ZQC) and No-Connect (for YFF)
B4 B4 OE I Output enable (active low)
A4 A4 AUD_DIR I Direction control signal for AUDIO_CLK and AUDIO_F-SYNC signals
G3 G3 AUDIO_OUT(A) O Connected to baseband audio subsystem; drive strength = 4 mA
G5 G5 AUDIO_OUT(B) I Connected to Wi-Link-6 PCM subsystem
D1 D1 WLAN_EN(A) I Connected to baseband SDIO controller
D6 D6 WLAN_EN(B) O Connected to SD/SDIO peripheral; drive strength = 2 mA
G2 G2 BT_UART_TX(A) O Connected to baseband UART subsystem; drive strength = 8 mA
G6 G6 BT_UART_TX(B) I Connected to BT UART subsystem of Wi-Link-6
D2 D2 WLAN_IRQ(A) O Connected to baseband SDIO controller; drive strength = 4 mA
2 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): TWL1200
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