Datasheet 搜索 > 逻辑控制器 > Nexperia（安世） > 74ABT08D,118 数据手册 > 74ABT08D,118 其他数据使用手册 1/16 页
器件3D模型￥ 8.4
74ABT08D,118 其他数据使用手册 - Nexperia（安世）
制造商:
Nexperia（安世）
分类:
逻辑控制器
封装:
SO-14
描述:
逻辑门 QUAD 2-INPUT AND GATE
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
74ABT08D,118数据手册
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of 16 Go
若手册格式错乱，请下载阅览PDF原文件
1. General description
The 74ABT623 high performance BiCMOS device combines low static and dynamic
power dissipation with high speed and high output drive.
The 74ABT623 is an octal transceiver featuring non-inverting 3-state bus compatible
outputs in both send and receive directions. This octal bus transceiver is designed for
asynchronous two-way communication between data buses.
The control function implementation allows maximum flexibility in timing. This device
allows data transmission from the A bus to the B bus or from the B bus to the A bus,
depending upon the logic levels at the enable inputs (pins OEAB and OEBA). The enable
inputs can be used to disable the device so that the buses are effectively isolated. The
dual enable function configuration gives this transceiver the capability to store data by
simultaneous enabling of pins OEAB and OEBA. Each output reinforces its input in this
transceiver configuration. Thus, when both control inputs are enabled and all other data
sources to the two sets of the bus lines are at high-impedance OFF-state, both sets of the
bus lines will remain at their last states. The 8-bit codes appearing on the two sets of
buses will be identical.
2. Features
n Octal bidirectional bus interface
n 3-state buffers
n Power-up 3-state
n Output capability: +64 mA and −32 mA
n data inputs are disabled during 3-state mode
n Latch-up protection exceeds 500 mA per JESD78B class II level A
n ESD protection:
u HBM JESD22-A114F exceeds 2000 V
u MM JESD22-A115-A exceeds 200 V
74ABT623
Octal transceiver with dual enable; non-inverting; 3-state
Rev. 03 — 22 October 2009 Product data sheet
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