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ADP7156ACPZ-3.3-R7 其他数据使用手册 - ADI（亚德诺）
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ADI（亚德诺）
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稳压芯片
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LFCSP-10
描述:
低压差稳压器 3.3/5Vin 1.2A Ultra Low Noise LDO, Fixed
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ADP7156ACPZ-3.3-R7数据手册
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Configurable, Dual 2 A/Single 4 A,
Synchronous Step-Down DC-to-DC Regulator
Data Sheet
ADP2114
Rev. B Document Feedback
Information furnished
by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2009–2012 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
Configurable 2 A/2 A or 3 A/1 A dual output load
combinations or 4 A combined single output
High efficiency: up to 95%
Input voltage V
IN
: 2.75 V to 5.5 V
Selectable fixed output: 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V or
adjustable output voltage to 0.6 V minimum
±1.5% accurate reference voltage
Selectable switching frequency: 300 kHz, 600 kHz, 1.2 MHz
or synchronized from 200 kHz to 2 MHz
Optimized gate slew rate for reduced EMI
External synchronization input or internal clock output
Dual-phase, 180° phase shifted PWM channels
Current mode for fast transient response
Pulse skip under light load or forced PWM operation
Input undervoltage lockout (UVLO)
Independent enable inputs and PGOOD outputs
Overcurrent and thermal overload protection
Externally programmable soft start
32-lead 5 mm × 5 mm LFCSP package
Supported by ADIsimPower™ design tool
APPLICATIONS
Point of load regulation
Telecommunications and networking systems
Consumer electronics
Industrial and Instrumentation
Medical
GENERAL DESCRIPTION
The ADP2114 is a versatile, synchronous step-down, switching
regulator that satisfies a wide range of customer point-of-load
requirements. The two PWM channels can be configured to
deliver independent outputs at 2 A and 2 A (or 3 A/1 A) or can be
configured as a single interleaved output capable of delivering 4 A.
The two PWM channels are 180º phase shifted to reduce input
ripple current and to reduce input capacitance. The ADP2114
provides high efficiency and operates at switching frequencies of
up to 2 MHz. At light loads, the ADP2114 can be set to operate
in pulse skip mode for higher efficiency or in forced PWM mode
to reduce EMI.
The ADP2114 is designed with an optimized gate slew rate to reduce
EMI emissions, allowing it to power sensitive, high performance
signal chain circuits. The switching frequency can be set to 300 kHz,
600 kHz, or 1.2 MHz and can be synchronized to an external clock
that minimizes the system noise. The bidirectional synchronization
pin is also configurable as a 90° out-of-phase output clock, providing
the possibility for a stackable multiphase power solution.
TYPICAL APPLICATION CIRCUIT
08143-001
22kΩ
1.2nF
22kΩ
1.2nF
47µF
V
OUT1
= 3.3V, 2A
f
SW
= 600kHz
4.7µH
47µF
22µF 22µF
1µF
22µF
V
OUT2
= 1.8V, 2A
2.2µH
V
IN
= 5V
10Ω
100kΩ100kΩ
VDD
GND
SCFG
OPCFG
FREQ
47kΩ
V1SET
15kΩ
VIN1
VIN2
VIN3
SW1
SW2
FB1
COMP1
SS1
EN1
COMP2
PGND4
PGND3
FB2
V2SET
SYNC/CLKOUT
SW4
SW3
VIN6
VIN5
VIN4
EN2
PGOOD2
ADP2114
PGOOD2
SYNC
PGOOD1
8.2kΩ
SS2
10nF
10nF
PGND1
PGND2
PGOOD1
Figure 1.
The ADP2114 input voltage range is from 2.75 V to 5.5 V, a n d it
converts to fixed outputs of 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, or
3.3 V that can be set independently for each channel using
external resistors. Using a resistor divider, it is also possible to
set the output voltage as low as 0.6 V. The ADP2114 operates
over the −40°C to +125°C junction temperature range.
100
70
75
80
85
90
95
0.01 0.1 1 3
EFFICIENCY (%)
LOAD CURRENT (A)
V
IN
= 5.0V; V
OUT
= 3.3V
V
IN
= 5.0V; V
OUT
= 1.8V
V
IN
= 3.3V; V
OUT
= 1.8V
08143-002
Figure 2. Typical Efficiency vs. Load Current
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