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ATMEGA88-20AU 其他数据使用手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
微控制器
封装:
TQFP-32
描述:
8 位 megaAVR 微控制器，4KB 到 16KB 闪存我们在 RS Components 提供 Atmel 的各种 megaAVR 8 位微控制器。每个微控制器均基于增强型 RISC 体系结构，并具有 QTouch 库支持。 所有 megaAVR 微控制器具有不同 Kb 的系统内可编程内存、EEPROM 和 SRAM 以及不同引脚和封装类型。 **megaAVR 8 位微控制器类型 ** ATmega8 ATmega16 ATmega48 ATmega88 ATmega162 ATmega164 ATmega165 ATmega168 ATmega8515 ATmega8535
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P9P10Hot
原理图在P12P16
封装尺寸在P367P368P369P370
型号编码规则在P364P365P366P383P384P386
封装信息在P367P384
技术参数、封装参数在P317
应用领域在P45P75P235P239P242P245P246P282P286
电气规格在P83P273P317P385
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ATMEGA88-20AU数据手册
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2018 Microchip Technology Inc. Data Sheet Complete DS40002074A-page 1
Features
• High performance, low power AVR
®
8-bit microcontroller
• Advanced RISC architecture
– 131 powerful instructions – most single clock cycle execution
– 32 × 8 general purpose working registers
– Fully static operation
– Up to 20 MIPS throughput at 20MHz
– On-chip 2-cycle multiplier
• High endurance non-volatile memory segments
– 4/8/16 Kbytes of in-system self-programmable flash program memory
– 256/512/512 bytes EEPROM
– 512/1K/1Kbytes internal SRAM
– Write/erase cyles: 10,000 flash/100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C
(1)
– Optional boot code section with independent lock bits
In-system programming by on-chip boot program
True read-while-write operation
– Programming lock for software security
•QTouch
®
library support
– Capacitive touch buttons, sliders and wheels
– QTouch and QMatrix acquisition
– Up to 64 sense channels
• Peripheral features
– Two 8-bit timer/counters with separate prescaler and compare mode
– One 16-bit timer/counter with separate prescaler, compare mode, and capture mode
– Real time counter with separate oscillator
megaAVR
®
Data Sheet
ATmega48/V/88/V/168/V
Introduction
The ATmega48/V/88/V/168/V is a low power, CMOS 8-bit microcontrollers based on the AVR
®
enhanced
RISC architecture. By executing instructions in a single clock cycle, the devices achieve CPU throughput
approaching one million instructions per second (MIPS) per megahertz, allowing the system designer to
optimize power consumption versus processing speed.
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