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DT28F160S5-70 其他数据使用手册 - Intel（英特尔）
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DT28F160S5-70数据手册
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E 28F160S5, 28F320S5
3
ADVANCE INFORMATION
CONTENTS
PAGE PAGE
1.0 INTRODUCTION .............................................5
1.1 New Features...............................................5
1.2 Product Overview.........................................5
1.3 Pinout and Pin Description...........................6
2.0 PRINCIPLES OF OPERATION .......................9
2.1 Data Protection ..........................................10
3.0 BUS OPERATION.........................................11
3.1 Read..........................................................11
3.2 Output Disable...........................................11
3.3 Standby......................................................11
3.4 Deep Power-Down.....................................11
3.5 Read Query Operation...............................11
3.6 Read Identifier Codes Operation................12
3.7 Write ..........................................................12
4.0 COMMAND DEFINITIONS............................12
4.1 Read Array Command................................16
4.2 Read Query Mode Command.....................16
4.2.1 Query Structure Output .......................16
4.2.2 Query Structure Overview ...................18
4.2.3 Block Status Register..........................19
4.2.4 CFI Query Identification String.............20
4.2.5 System Interface Information..............21
4.2.6 Device Geometry Definition.................22
4.2.7 Intel-Specific Extended Query Table ...23
4.3 Read Identifier Codes Command...............24
4.4 Read Status Register Command................24
4.5 Clear Status Register Command................25
4.6 Block Erase Command ..............................25
4.7 Full Chip Erase Command.........................25
4.8 Write to Buffer Command...........................26
4.9 Byte/Word Write Command........................26
4.10 STS Configuration Command...................27
4.11 Block Erase Suspend Command..............27
4.12 Program Suspend Command...................27
4.13 Set Block Lock-Bit Commands.................28
4.14 Clear Block Lock-Bits Command..............28
5.0 DESIGN CONSIDERATIONS........................38
5.1 Three-Line Output Control..........................38
5.2. STS and WSM Polling...............................38
5.3 Power Supply Decoupling ..........................38
5.4 V
PP
Trace on Printed Circuit Boards...........38
5.5 V
CC
, V
PP
, RP# Transitions..........................38
5.6 Power-Up/Down Protection........................38
6.0 ELECTRICAL SPECIFICATIONS..................39
6.1 Absolute Maximum Ratings........................39
6.2 Operating Conditions..................................39
6.2.1 Capacitance.........................................40
6.2.2 AC Input/Output Test Conditions .........40
6.2.3 DC Characteristics...............................41
6.2.4 AC Characteristics - Read-Only
Operations..........................................43
6.2.5 AC Characteristics - Write Operations .45
6.2.6 Reset Operations.................................47
6.2.7 Erase, Program, and Lock-Bit
Configuration Performance.................48
APPENDIX A: Device Nomenclature and
Ordering Information ..................................49
APPENDIX B: Additional Information...............50
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