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Datasheet 搜索 > 时钟发生器 > ADI(亚德诺) > HMC1033LP6GETR 数据手册 > HMC1033LP6GETR 其他数据使用手册 3/42 页
HMC1033LP6GETR
器件3D模型
1.434
导航目录
  • 引脚图在P11
  • 典型应用电路图在P3
  • 封装尺寸在P10
  • 标记信息在P10
  • 功能描述在P4P11
  • 技术参数、封装参数在P10
  • 应用领域在P3
HMC1033LP6GETR数据手册
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For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824
Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
CLOCK GENERATORS - SMT
1
HMC1033LP6GE
v01.0712
HIGH PERFORMANCE, +3.3 V CLOCK GENERATOR
25 - 550 MHz
Functional Diagram
Features
3.3 V Only, Single Supply Rail Operation
Output Frequency Range: 25 MHz - 550 MHz
Integer or Fractional-N mode Frequency Translation
Congurable LVDS-compatible or LVPECL type
Differential Outputs
“Power Priority” and“Performance Priority” modes
99 fs RMS Jitter Generation (12 kHz - 20 MHz,
550 MHz, Typ)
-163 dBc/Hz Phase Noise Floor to Improve ADC/DAC
SNR (maximum output swing levels).
Adjustable PLL Loop BW via External Filter
Output Disable/Mute Control
Lock Detect Signal
Exact Frequency Mode to achieve reference
frequency tuning, and 0 Hz frequency error
40 Lead 6x6 mm SMT Package: 36 mm
2
Typical Applications
• 10G/40G/100G Optical Modules, Transponders,
Line Cards
• OTN and SONET/SDH Applications
• Data Converters, Sample Clock Generation
• Cellular/4G Infrastructure
• High Frequency Processor/FPGA Clocks
• Any Frequency Clock Rate Generation
• Low Jitter SAW Oscillator Replacement
• DDS Replacement
• Frequency Translation
• Frequency Margining

HMC1033LP6GETR 数据手册

ADI(亚德诺)
58 页 / 1.14 MByte
ADI(亚德诺)
12 页 / 1.04 MByte
ADI(亚德诺)
42 页 / 1.82 MByte
ADI(亚德诺)
11 页 / 1.03 MByte
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