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KA34063A 产品设计图 - ON Semiconductor（安森美）
制造商:
ON Semiconductor（安森美）
分类:
DC/DC转换器
封装:
PDIP-8
描述:
PWM（脉冲宽度调制）控制器，Fairchild Semiconductor### 离线和隔离直流-直流控制器，Fairchild Semiconductor回扫控制器、线路电平控制 (LLC) 控制器和初级侧调节控制器显著节能，以满足开关模式电源 (SMPS) 设计的需要。 所有控制器随附集成软启动和过压、开口反馈、过载、输出短路、过电流、电压中断和欠压闭锁功能。
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符号图
焊盘图
引脚图
产品图
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封装尺寸在P1
标记信息在P1
技术参数、封装参数在P2
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KA34063A数据手册
Page:
of 2 Go
若手册格式错乱，请下载阅览PDF原文件
1
PDIP−8
CASE 626−05
ISSUE P
DATE 22 APR 201
5
SCALE 1:1
14
58
b2
NOTE 8
D
b
L
A1
A
eB
XXXXXXXXX
AWL
YYWWG
E
GENERIC
MARKING DIAGRAM*
XXXX = Specific Device Code
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
A
TOP VIEW
C
SEATING
PLANE
0.010 CA
SIDE VIEW
END VIEW
END VIEW
WITH LEADS CONSTRAINED
DIM MIN MAX
INCHES
A −−−− 0.210
A1 0.015 −−−−
b 0.014 0.022
C 0.008 0.014
D 0.355 0.400
D1 0.005 −−−−
e 0.100 BSC
E 0.300 0.325
M −−−− 10
−−− 5.33
0.38 −−−
0.35 0.56
0.20 0.36
9.02 10.16
0.13 −−−
2.54 BSC
7.62 8.26
−−− 10
MIN MAX
MILLIMETERS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACK-
AGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3.
4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH
OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE
NOT TO EXCEED 0.10 INCH.
5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM
PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR
TO DATUM C.
6. DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THE
LEADS UNCONSTRAINED.
7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE
LEADS, WHERE THE LEADS EXIT THE BODY.
8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE
CORNERS).
E1 0.240 0.280 6.10 7.11
b2
eB −−−− 0.430 −−− 10.92
0.060 TYP 1.52 TYP
E1
M
8X
c
D1
B
A2 0.115 0.195 2.92 4.95
L 0.115 0.150 2.92 3.81
°°
H
NOTE 5
e
e/2
A2
NOTE 3
M
B
M
NOTE 6
M
STYLE 1:
PIN 1. AC IN
2. DC + IN
3. DC − IN
4. AC IN
5. GROUND
6. OUTPUT
7. AUXILIARY
8. V
CC
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
http://onsemi.com
1
© Semiconductor Components Industries, LLC, 2002
October, 2002 − Rev. 0
Case Outline Number:
XXX
DOCUMENT NUMBER:
STATUS:
NEW STANDARD:
DESCRIPTION:
98ASB42420B
ON SEMICONDUCTOR STANDARD
PDIP−8
Electronic versions are uncontrolled except when
accessed directly from the Document Repository. Printed
versions are uncontrolled except when stamped
“CONTROLLED COPY” in red.
PAGE 1 OF 2
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