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MSP430FR6989IPZR 其他数据使用手册 - TI（德州仪器）
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MSP430FR6989IPZR数据手册
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Detailed Bug Description
5
SLAZ517Q–March 2013–Revised December 2016
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Copyright © 2013–2016, Texas Instruments Incorporated
MSP430FR6989 Device Erratasheet
IDE/Compiler Version Number Notes
IAR Embedded Workbench Not affected
TI MSP430 Compiler Tools (Code
Composer Studio)
v4.0.x or later
User is required to add the compiler or
assembler flag option below.
--silicon_errata=CPU21
MSP430 GNU Compiler (MSP430-GCC) MSP430-GCC 4.9 build 167 or later
CPU22 CPU Module
Function Indirect addressing mode with the Program Counter as the source register may produce
unexpected results
Description When using the indirect addressing mode in an instruction with the Program Counter
(PC) as the source operand, the instruction that follows immediately does not get
executed.
For example in the code below, the ADD instruction does not get executed.
mov @PC, R7
add #1h, R4
Workaround Refer to the table below for compiler-specific fix implementation information.
IDE/Compiler Version Number Notes
IAR Embedded Workbench Not affected
TI MSP430 Compiler Tools (Code
Composer Studio)
v4.0.x or later
User is required to add the compiler or
assembler flag option below.
--silicon_errata=CPU22
MSP430 GNU Compiler (MSP430-GCC) MSP430-GCC 4.9 build 167 or later
CPU40 CPU Module
Function PC is corrupted when executing jump/conditional jump instruction that is followed by
instruction with PC as destination register or a data section
Description If the value at the memory location immediately following a jump/conditional jump
instruction is 0X40h or 0X50h (where X = don't care), which could either be an
instruction opcode (for instructions like RRCM, RRAM, RLAM, RRUM) with PC as
destination register or a data section (const data in flash memory or data variable in
RAM), then the PC value is auto-incremented by 2 after the jump instruction is executed;
therefore, branching to a wrong address location in code and leading to wrong program
execution.
For example, a conditional jump instruction followed by data section (0140h).
@0x8012 Loop DEC.W R6
@0x8014 DEC.W R7
@0x8016 JNZ Loop
@0x8018 Value1 DW 0140h
Workaround In assembly, insert a NOP between the jump/conditional jump instruction and program
code with instruction that contains PC as destination register or the data section.
Refer to the table below for compiler-specific fix implementation information.
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