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SI1002-E-GM2 其他数据使用手册 - Silicon Labs（芯科）
制造商:
Silicon Labs（芯科）
分类:
8位微控制器
封装:
VFLGA-42
描述:
射频微控制器 - MCU 64kB, 4kB RAM, +13 dBm, programmable XCVR
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P29P30P31P32P194P208Hot
典型应用电路图在P21
原理图在P18P19P20P23P24P25P26P27P74P91P96P100
封装尺寸在P35P36
型号编码规则在P28P381
技术参数、封装参数在P40P57P59P70P71P72P90P96P98P99P146P158
应用领域在P68P170
电气规格在P40P41P42P43P50P56P57P58P59P60P61P62
型号编号列表在P146
导航目录
SI1002-E-GM2数据手册
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若手册格式错乱，请下载阅览PDF原文件
Ultra Low Power, 64/32 kB, 10-Bit ADC
MCU with Integrated 240–960 MHz EZRadioPRO
®
Transceiver
Si1000/1/2/3/4/5
Rev. 1.3 2/13 Copyright © 2013 by Silicon Laboratories Si1000/1/2/3/4/5
Ultra Low Power: 0.9 to 3.6 V Operation
- Typical sleep mode current < 0.1 µA; retains state and
RAM contents over full supply range; fast wakeup of <
2 µs
- Less than 600 nA with RTC running
- Less than 1 µA with RTC running and radio state retained
- On-chip dc-dc converter allows operation down to 0.9 V.
- Two built-in brown-out detectors cover sleep and active
modes
10-Bit Analog to Digital Converter
- Up to 300 ksps
- Up to 18 external inputs
- External pin or internal VREF (no external capacitor
required)
- Built-in temperature sensor
- External conversion start input option
- Autonomous burst mode with 16-bit automatic averaging
accumulator
Dual Comparators
- Programmable hysteresis and response time
- Configurable as interrupt or reset source
- Low current (< 0.5 µA)
On-Chip Debug
- On-chip debug circuitry facilitates full-speed, non-intrusive
in-system debug (No emulator required)
- Provides breakpoints, single stepping
- Inspect/modify memory and registers
- Complete development kit
High-Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of instruc-
tions in 1 or 2 system clocks
- Up to 25 MIPS throughput with 25 MHz clock
- Expanded interrupt handler
Memory
- 4352 bytes internal data RAM (256 + 4096)
- 64 kB (Si1000/2/4) or 32 kB (Si1001/3/5) flash; In-system
programmable in 1024-byte sectors—1024 bytes are
reserved in the 64
kB devices
EZRadioPRO
®
Transceiver
- Frequency range = 240–960 MHz
- Sensitivity = –121 dBm
- FSK, GFSK, and OOK modulation
- Max output power = +20 dBm (Si1000/1), +13 dBm
(Si1002/3/4/5)
- RF power consumption
- 18.5 mA receive
- 18 mA @ +1 dBm transmit
- 30 mA @ +13 dBm transmit
- 85 mA @ +20 dBm transmit
- Data rate = 0.123 to 256 kbps
- Auto-frequency calibration (AFC)
- Antenna diversity and transmit/receive switch control
- Programmable packet handler
- TX and RX 64 byte FIFOs
- Frequency hopping capability
- On-chip crystal tuning
Digital Peripherals
- 19 or 16 port I/O plus 3 GPIO pins; Hardware enhanced
UART, SPI, and I
2
C serial ports available concurrently
- Low power 32-bit SmaRTClock
- Four general purpose 16-bit counter/timers; six channel
programmable counter array (PCA)
Clock Sources
- Precision internal oscillators: 24.5 MHz with ±2% accuracy
supports UART operation; spread-spectrum mode for
reduced EMI; Low power 20
MHz internal oscillator
- External oscillator: Crystal, RC, C, CMOS clock
- SmaRTClock oscillator: 32.768 kHz crystal or self-oscillate
- Can switch between clock sources on-the-fly; useful in
implementing various power saving modes
Package
- 42-pin LGA (5 x 7 mm)
Temperature Range: –40 to +85 °C
ANALOG
PERIPHERALS
10-bit
300 ksps
ADC
64/32 kB
ISP FLASH
4352 B
SRAM
POR
DEBUG
CIRCUITRY
FLEXIBLE
INTERRUPTS
8051 CPU
(25 MIPS)
TEMP
SENSOR
DIGITAL I/O
24.5 MHz PRECISION
INTERNAL OSCILLATOR
HIGH-SPEED CONTROLLER CORE
A
M
U
X
CROSSBAR
VOLTAGE
COMPARATORS
+
–
WDT
UART
SMBus
PCA
Timer 0
Timer 1
Timer 2
Timer 3
Port 0
SPI
IREF
EZRadio
PRO
Serial
Interface
Port 1
Port 2
+
–
VREG
20 MHz LOW POWER
INTERNAL OSCILLATOR
VREF
CRC
HARDWARE smaRTClockExternal Oscillator
EZRadioPRO
(240–960 MHz)
OSC
PA
LNA
Digital
Modem
Delta
Sigma
Modulator
Digital
Logic
Mixer
PGA
ADC
PLL
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