Datasheet 搜索 > 微控制器 > ATMEL（爱特美尔） > ATXMEGA32D4-MHR 数据手册 > ATXMEGA32D4-MHR 产品设计参考手册 4/308 页
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ATXMEGA32D4-MHR 产品设计参考手册 - ATMEL（爱特美尔）
制造商:
ATMEL（爱特美尔）
分类:
微控制器
封装:
VQFN-44
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P103P104Hot
原理图在P4P7P125P146P160P161P203P204P227
应用领域在P19P20P98P171P172P181P256P274P278P280P288P289
电气规格在P176
导航目录
ATXMEGA32D4-MHR数据手册
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若手册格式错乱，请下载阅览PDF原文件
4
XMEGA D [MANUAL]
Atmel-8210G–AVR XMEGA D–12/2014
Figure 2-1. AVR XMEGA D Block Diagram
In Table 2-1 on page 5 a feature summary for the AVR XMEGA D family is shown, split into one feature summary column
for each sub-family. Each sub-family has identical feature set, but different memory options, refer to their device
datasheet for ordering codes and memory options.
Power
Supervision
POR/BOD &
RESET
PORT A (8)
PORT B (8)
EVENT ROUTING NETWORK
BUS
Matrix
SRAM
ADCA
ACA
OCD
PDI
PA[0..7]
PB[0..7]
Watchdog
Timer
Watchdog
Oscillator
Interrupt
Controller
DATA BUS
Prog/Debug
Controller
VCC
GND
PORT R (2)
XTAL1
XTAL2
PR[0..1]
TOSC1
TOSC2
PQ[0..7]
Oscillator
Circuits/
Clock
Generation
Oscillator
Control
Real Time
Counter
Event System
Controller
PDI_DAT
A
RESET/
PDI_CLK
Sleep
Controller
CRC
IRCOM
PORT Q (8)
PORT C (8)
PC[0..7]
TCC0:1
USARTC0
TWIC
SPIC
PD[0..7] PE[0..7] PF[0..7]
PORT D (8)
TCD0
USARTD0
SPID
TCF0
USARTF0
TCE0
USARTE0
TWIE
PORT E (8) PORT F (8)
EVENT ROUTING NETWORK
Int. Refs.
AREFA
AREFB
Tempref
VCC/10
CPU
NVM Controller
MORPEE
h
sal
F
DATA BUS
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