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MK20DN512ZVLL10 产品设计参考手册 - Freescale（飞思卡尔）
制造商:
Freescale（飞思卡尔）
分类:
微控制器
封装:
LQFP-100
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P209P223P1647Hot
典型应用电路图在P822P827P1524
原理图在P217P325P365P366P417P495P528P562P573P574P610P730
功能描述在P254P256P292P339P340P342P349P350P359P360P362P381
应用领域在P112P1084P1408P1491
导航目录
MK20DN512ZVLL10数据手册
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Section Number Title Page
3.7 Analog...........................................................................................................................................................................111
3.7.1 16-bit SAR ADC with PGA Configuration.................................................................................................111
3.7.2 CMP Configuration......................................................................................................................................118
3.7.3 12-bit DAC Configuration...........................................................................................................................120
3.7.4 VREF Configuration....................................................................................................................................121
3.8 Timers...........................................................................................................................................................................122
3.8.1 PDB Configuration......................................................................................................................................122
3.8.2 FlexTimer Configuration.............................................................................................................................125
3.8.3 PIT Configuration........................................................................................................................................129
3.8.4 Low-power timer configuration...................................................................................................................130
3.8.5 CMT Configuration......................................................................................................................................132
3.8.6 RTC configuration.......................................................................................................................................133
3.9 Communication interfaces............................................................................................................................................134
3.9.1 Universal Serial Bus (USB) Subsystem.......................................................................................................134
3.9.2 CAN Configuration......................................................................................................................................139
3.9.3 SPI configuration.........................................................................................................................................141
3.9.4 I2C Configuration........................................................................................................................................144
3.9.5 UART Configuration...................................................................................................................................145
3.9.6 SDHC Configuration....................................................................................................................................148
3.9.7 I2S configuration..........................................................................................................................................149
3.10 Human-machine interfaces (HMI)................................................................................................................................151
3.10.1 GPIO configuration......................................................................................................................................151
3.10.2 TSI Configuration........................................................................................................................................152
Chapter 4
Memory Map
4.1 Introduction...................................................................................................................................................................155
4.2 System memory map.....................................................................................................................................................155
4.2.1 Aliased bit-band regions..............................................................................................................................156
K20 Sub-Family Reference Manual, Rev. 6, Nov 2011
6 Freescale Semiconductor, Inc.
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