Datasheet 搜索 > 微控制器 > Cypress Semiconductor（赛普拉斯） > CY8C27243-24PVXI 数据手册 > CY8C27243-24PVXI 用户编程技术手册 1/69 页
器件3D模型￥ 26.023
CY8C27243-24PVXI 用户编程技术手册 - Cypress Semiconductor（赛普拉斯）
制造商:
Cypress Semiconductor（赛普拉斯）
分类:
微控制器
封装:
SSOP-20
描述:
CYPRESS SEMICONDUCTOR CY8C27243-24PVXI 微控制器, 8位, PSOC1, CY8C27xxx, 24 MHz, 16 KB, 256 Byte, 20 引脚, SSOP
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P9P10P11P12P13P14P15Hot
原理图在P1P4P5
封装尺寸在P46P47P48
型号编码规则在P20P53P54
封装信息在P44P53
焊接温度在P50
功能描述在P40P53
技术参数、封装参数在P19P20P21P22P23P24P25P26P27P28P29P30
应用领域在P53
电气规格在P19P20P35
型号编号列表在P61P63
导航目录
CY8C27243-24PVXI数据手册
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CY8C27143/CY8C27243
CY8C27443/CY8C27543
CY8C27643
PSoC
®
Programmable System-on-Chip™
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document Number: 38-12012 Rev. AB Revised September 19, 2014
PSoC
®
Programmable System-on-Chip™
Features
■ Powerful Harvard-architecture processor
❐ M8C processor speeds up to 24 MHz
❐ 8 × 8 multiply, 32-bit accumulate
❐ Low power at high speed
❐ Operating voltage: 3.0 V to 5.25 V
❐ Operating voltages down to 1.0 V using on-chip switch mode
pump (SMP)
❐ Industrial temperature range: –40 C to +85 C
■ Advanced peripherals (PSoC
®
blocks)
❐ Twelve rail-to-rail analog PSoC blocks provide:
• Up to 14-bit analog-to-digital converters (ADCs)
• Up to 9-bit digital-to-analog converters (DACs)
• Programmable gain amplifiers (PGAs)
• Programmable filters and comparators
❐ Eight digital PSoC blocks provide:
• 8- to 32-bit timers and counters, 8- and 16-bit pulse-width
modulators (PWMs)
• Cyclical redundancy check (CRC) and pseudo random
sequence (PRS) modules
• Up to two full-duplex universal asynchronous receiver
transmitters (UARTs)
• Multiple serial peripheral interface (SPI)masters or slaves
• Connectable to all general-purpose I/O (GPIO) pins
❐ Complex peripherals by combining blocks
■ Precision, programmable clocking
❐ Internal 2.5% 24- / 48-MHz main oscillator
❐ 24- / 48-MHz with optional 32 kHz crystal
❐ Optional external oscillator up to 24 MHz
❐ Internal oscillator for watchdog and sleep
■ Flexible on-chip memory
❐ 16 KB flash program storage 50,000 erase/write cycles
❐ 256-bytes SRAM data storage
❐ In-system serial programming (ISSP)
❐ Partial flash updates
❐ Flexible protection modes
❐ Electronically erasable programmable read only memory
(EEPROM) emulation in flash
■ Programmable pin configurations
❐ 25-mA sink, 10-mA source on all GPIOs
❐ Pull-up, pull-down, high-Z, strong, or open-drain drive modes
on all GPIOs
❐ Eight standard analog inputs on GPIO, plus four additional
analog inputs with restricted routing
❐ Four 30-mA analog outputs on GPIOs
❐ Configurable interrupt on all GPIOs
■ Additional system resources
❐ I
2
C slave, master, and multi-master to 400 kHz
❐ Watchdog and sleep timers
❐ User-configurable low-voltage detection (LVD)
❐ Integrated supervisory circuit
❐ On-chip precision voltage reference
■ Complete development tools
❐ Free development software (PSoC Designer™)
❐ Full-featured, in-circuit emulator (ICE) and programmer
❐ Full-speed emulation
❐ Complex breakpoint structure
❐ 128 KB trace memory
Logic Block Diagram
DIGITAL SYSTEM
SRAM
256 Bytes
Interrupt
Controller
Sleep and
Watchdog
Multiple Clock Sources
(Includes IMO, ILO, PLL, and ECO)
Global Digital Interconnect
Global Analog Interconnect
PSoC
CORE
CPU Core (M8C)
SROM Flash 16 KB
Digital
Block
Array
Multiply
Accum.
Switch
Mode
Pump
Internal
Voltage
Ref.
Digital
Clocks
POR and LVD
System Resets
Decimator
SYSTEM RESOURCES
ANALOG SYSTEM
Analog
Ref.
Analog
Input
Muxing
I C
2
Port 4 Port 3 Port 2 Port 1 Port 0
Analog
Drivers
System Bus
Analog
Block
Array
Port 5
Errata: For information on silicon errata, see “Errata” on page 61. Details include trigger conditions, devices affected, and proposed workaround.
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