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PIC18F46K40T-I/MV
器件3D模型
1.935
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  • 引脚图在P2P27
  • 封装尺寸在P33
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  • 电气规格在P24
PIC18F46K40T-I/MV数据手册
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2014-2015 Microchip Technology Inc. DS40001772B-page 1
PIC18(L)F2X/4XK40
1.0 OVERVIEW
This programming specification describes an SPI-based programming method for the PIC18(L)F2X/4XK40 family of
microcontrollers. Section 3.0 “Programming Algorithms” describes the programming commands, programming
algorithms and electrical specifications which are used in that particular programming method. Appendix B contains
individual part numbers, device identification and checksum values, pinout and packaging information, and
Configuration Words.
1.1 Programming Data Flow
Nonvolatile Memory (NVM) programming data can be supplied by either the high-voltage In-Circuit Serial
Programming™ (ICSP™) interface or the low-voltage In-Circuit Serial Programming (ICSP) interface. Data can be
programmed into the Program Flash Memory (PFM), Data EEPROM Memory, dedicated “User ID” locations and the
Configuration Words.
1.2 Write and/or Erase Selection
Erasing or writing is selected according to the command used to begin operation (see Table 3-1). The terminologies used
in this document, related to erasing/writing to the program memory, are defined in Table 1-1 and are detailed below.
1.2.1 ERASING MEMORY
Memory is erased by row or in bulk, where ‘bulk’ includes many subsets of the total memory space. The duration of the
erase is determined by the size of program memory. All Bulk ICSP Erase commands have minimum V
DD
requirements,
which are higher than the Row Erase and write requirements.
1.2.2 WRITING MEMORY
Memory is written one row at a time. Multiple load data for NVM commands is used to fill the row data latches. The
duration of the write can be determined either internally or externally.
1.2.3 MULTI-WORD PROGRAMMING INTERFACE
Program Flash Memory (PFM) panels include up to a 64-word (one row) programming interface. Refer to Table 3-3 for
row size of erase and write operations for the PIC18(L)F2X/4XK40 family. The row to be programmed must first be
erased, either with a Bulk Erase or a Row Erase.
Note 1: This is a SPI-compatible programming method with 8-bit commands.
2: The low-voltage entry code is now 32 clocks and MSb first, unlike previous PIC18 devices which had
33 clocks and LSb first.
TABLE 1-1: PROGRAMMING TERMS
Term Definition
Programmed Cell A memory cell at logic ‘0
Erased Cell A memory cell at logic1
Erase Change memory cell from a ‘0’ to a ‘1
Write Change memory cell from a ‘1’ to a ‘0
Program Generic erase and/or write
PIC18(L)F2X/4XK40 Memory Programming Specification

PIC18F46K40T-I/MV 数据手册

Microchip(微芯)
594 页 / 5.71 MByte
Microchip(微芯)
44 页 / 0.33 MByte
Microchip(微芯)
10 页 / 0.09 MByte
Microchip(微芯)
2 页 / 0.1 MByte

PIC18F46K40 数据手册

Microchip(微芯)
PIC 64MHz 闪存:32K@x16bit
Microchip(微芯)
PIC 64MHz 闪存:32K@x16bit
Microchip(微芯)
PIC 64MHz 闪存:32K@x16bit RAM:3.6KB
Microchip(微芯)
8位微控制器 -MCU 64KB Flash, 4KB RAM, 256B EEPROM, 10-bit ADC2, 5-bit DAC, Comp, PWM, CCP, CWG, HLT, WWDT, SCAN/CRC, ZCD, PPS, EUSART, SPI/I2C, IDLE/DOZE/PMD
Microchip(微芯)
PIC 64MHz 闪存:32K@x16bit
Microchip(微芯)
PIC 64MHz 闪存:32K@x16bit RAM:3.6KB
Microchip(微芯)
8位微控制器 -MCU 64KB Flash, 4KB RAM, 256B EEPROM, 10-bit ADC2, 5-bit DAC, Comp, PWM, CCP, CWG, HLT, WWDT, SCAN/CRC, ZCD, PPS, EUSART, SPI/I2C, IDLE/DOZE/PMD
Microchip(微芯)
8位微控制器 -MCU 64KB Flash, 4KB RAM, 256B EEPROM, 10-bit ADC2, 5-bit DAC, Comp, PWM, CCP, CWG, HLT, WWDT, SCAN/CRC, ZCD, PPS, EUSART, SPI/I2C, IDLE/DOZE/PMD
Microchip(微芯)
PIC 64MHz 闪存:32K@x16bit RAM:3.6KB
Microchip(微芯)
PIC 64MHz 闪存:32K@x16bit RAM:3.6KB
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