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XCF02SVOG20CES 用户编程技术手册 - Xilinx（赛灵思）
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DS123 (v2.4) July 20, 2004 www.xilinx.com 1
Preliminary Product Specification 1-800-255-7778
© 2004 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
Features
• In-System Programmable PROMs for Configuration of
Xilinx FPGAs
• Low-Power Advanced CMOS FLASH Process
• Endurance of 20,000 Program/Erase Cycles
• Operation over Full Industrial Temperature Range
(–40°C to +85°C)
• IEEE Standard 1149.1/1532 Boundary-Scan (JTAG)
Support for Programming, Prototyping, and Testing
• JTAG Command Initiation of Standard FPGA
Configuration
• Cascadable for Storing Longer or Multiple Bitstreams
• Dedicated Boundary-Scan (JTAG) I/O Power Supply
(V
CCJ
)
• I/O Pins Compatible with Voltage Levels Ranging From
1.5V to 3.3V
• Design Support Using the Xilinx Alliance ISE and
Foundation ISE Series Software Packages
• XCF01S/XCF02S/XCF04S
- 3.3V supply voltage
- Serial FPGA configuration interface (up to 33 MHz)
- Available in small-footprint VO20 and VOG20
packages.
• XCF08P/XCF16P/XCF32P
- 1.8V supply voltage
- Serial or parallel FPGA configuration interface
(upto33MHz)
- Available in small-footprint VO48, VOG48, FS48,
and FSG48 packages
- Design revision technology enables storing and
accessing multiple design revisions for
configuration
- Built-in data decompressor compatible with Xilinx
advanced compression technology
Description
Xilinx introduces the Platform Flash series of in-system pro-
grammable configuration PROMs. Available in 1 to 32
Megabit (Mbit) densities, these PROMs provide an
easy-to-use, cost-effective, and reprogrammable method
for storing large Xilinx FPGA configuration bitstreams. The
Platform Flash PROM series includes both the 3.3V
XCFxxS PROM and the 1.8V XCFxxP PROM. The XCFxxS
version includes 4-Mbit, 2-Mbit, and 1-Mbit PROMs that
support Master Serial and Slave Serial FPGA configuration
modes (Figure 1). The XCFxxP version includes 32-Mbit,
16-Mbit, and 8-Mbit PROMs that support Master Serial,
Slave Serial, Master SelectMAP, and Slave SelectMAP
FPGA configuration modes (Figure 2). A summary of the
Platform Flash PROM family members and supported fea-
tures is shown in Table 1 .
3
9
Platform Flash In-System Programmable
Configuration PROMS
DS123 (v2.4) July 20, 2004
0
Preliminary Product Specification
R
Table 1 : Platform Flash PROM Features
Density V
CCINT
V
CCO
/ V
CCJ
Range Packages
JTAG ISP
Programming
Serial
Configuration
Parallel
Configuration
Design
Revisioning Compression
XCF01S 1 Mbit 3.3V
1.8V - 3.3V
VO20/VOG28
√√
XCF02S 2 Mbit 3.3V
1.8V - 3.3V
VO20/VOG28
√√
XCF04S 4 Mbit 3.3V
1.8V - 3.3V
VO20/VOG28
√√
XCF08P 8 Mbit 1.8V
1.5V - 3.3V
VO48/VOG48
FS48/FSG48
√√√√√
XCF16P 16 Mbit 1.8V 1.5V - 3.3V
VO48/VOG48
FS48/FSG48
√√√√√
XCF32P 32 Mbit 1.8V 1.5V - 3.3V
VO48/VOG48
FS48/FSG48
√√√√√
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