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IR2302SPBF
器件3D模型
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IR2302SPBF数据手册
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3
AN-978 RevD
2. TYPICAL BLOCK DIAGRAM
The block diagram of the IRS2110 will be used to illustrate the typical structure of most MGDs;
this is shown in Figure 2. It comprises a drive circuit for a ground referenced power transistor,
another for a high-side one, level translators and input logic circuitry
.
Figure 2: Block Diagram of the IRS2110
Figure 3: Silicon Cross-Section Showing the Parasitic Capacitances
V
DD
H
IN
SD
L
IN
V
SS
R
S
R
S
V
DD
/
V
CC
LEVEL
TRANSLATOR
AND PW
DISCRIMINATOR
PULSE
GENERATOR
UV
DETECT
DELAY
V
DD
/
V
BS
LEVEL
TRANSLATOR
PULSE
DISCRIMINATOR
C
d-sub
C
b-sub
UV
DETECT
LATCH
LOGIC
Q
Q
V
B
HO
V
S
LO
2
COMM
C
BOOT
V
CC
V
R
V
DD
/
V
CC
LEVEL
TRANSLATOR
AND PW
DISCRIMINATOR
HIGH-SIDE
CMOS
LD MOS (LEVEL
SHIFTERS)
p+
n+ n+
p-well
p
n-
p
C
b-sub
p+
p
n+
n+
n+
p
n-
C
d-sub
p+
p-
COM

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