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IRF40H210 开发手册 - Infineon(英飞凌)
制造商:
Infineon(英飞凌)
分类:
MOS管
封装:
PQFN-8
描述:
IRF40H210 编带
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
IRF40H210数据手册
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Figure 4 PSpice level 3 model for IPB072N15N3 G
Using this model, and ensuring that we retain the simulation data for all the sub-circuits, we can observe the
temperature behavior at various locations of the chip under the datasheet conditions used to define the rating
for avalanche energy, single pulse (E
AS
). These conditions include T
j
= 25°C and i
AS
(0) = 100 A, where i
AS
(0) is the
initial current of a single pulse avalanche event. The SIMetrix schematic [2] is shown in Figure 5, where the
supply V3 is disconnected from the circuit when the Device Under Test (DUT) faces avalanche. In this case the
DUT is U1.
Figure 5 Single pulse avalanche - simulation circuit for heat spreading
Some key facts about avalanche
2 Single pulse avalanche
Application Note 6 Version 1.0
2017-01-9
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