Datasheet 搜索 > 移位寄存器 > NXP（恩智浦） > 74AHCT595PW,118 数据手册 > 74AHCT595PW,118 数据手册 9/25 页
器件3D模型￥ 0.806
74AHCT595PW,118 数据手册 - NXP（恩智浦）
制造商:
NXP（恩智浦）
分类:
移位寄存器
封装:
TSSOP-16
描述:
NXP 74AHCT595PW,118 移位寄存器, AHCT系列, 高速CMOS, 串行至并行、串行至串行, 1元件, TSSOP, 16 引脚, 4.5 V, 5.5 V
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P3Hot
典型应用电路图在P11P12
原理图在P1P9P11
封装尺寸在P14P16P17
标记信息在P14P15
封装信息在P13P14P15P16P17
技术参数、封装参数在P4
应用领域在P1P25
电气规格在P5
导航目录
74AHCT595PW,118数据手册
Page:
of 25 Go
若手册格式错乱，请下载阅览PDF原文件
3D
C3
1D
C1
R
3D
C3
2D
C2
R
3D
C3
2D
C2
R
3D
C3
2D
C2
R
3D
C3
2D
C2
R
3D
C3
2D
C2
R
3D
C3
2D
C2
R
3D
C3
2D
C2
R
13
12
10
11
14
15
1
2
3
4
5
6
7
9
Q
A
Q
B
Q
C
Q
D
Q
E
Q
F
Q
G
Q
H
Q
H′
OE
SRCLR
RCLK
SRCLK
SER
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
SN54AHCT595
,
SN74AHCT595
www.ti.com
SCLS374N –MAY 1997–REVISED JULY 2014
9 Detailed Description
9.1 Overview
The SNx4AHCT595 devices contain an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage
register. The storage register has parallel 3-state outputs. Separate clocks are provided for the shift and storage
registers. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and serial outputs for
cascading. When the output-enable (OE) input is high, the outputs are in the high-impedance state. Both the shift
register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered. If both clocks are
connected together, the shift register always is one clock pulse ahead of the storage register.
9.2 Functional Block Diagram
Pin numbers shown are for the D, DB, J, N, NS, PW, and W packages.
Copyright © 1997–2014, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Links: SN54AHCT595 SN74AHCT595
器件 Datasheet 文档搜索
AiEMA 数据库涵盖高达 72,405,303 个元件的数据手册，每天更新 5,000 多个 PDF 文件
