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74AVC8T245PW,118 数据手册 - NXP(恩智浦)
制造商:
NXP(恩智浦)
分类:
逻辑控制器
封装:
TSSOP-24
描述:
74AVC 系列 3.6 V 3态 8位 双电源 转换 收发器-TSSOP-24
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74AVC8T245PW,118数据手册
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1. General description
The 74AVC8T245 is an 8-bit, dual supply transceiver that enables bidirectional level
translation. It features two 8-bit input-output ports (An and Bn), a direction control input
(DIR), a output enable input (OE
) and dual supply pins (V
CC(A)
and V
CC(B)
). Both V
CC(A)
and V
CC(B)
can be supplied at any voltage between 0.8 V and 3.6 V making the device
suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V,
2.5 V and 3.3 V). Pins An, OE
and DIR are referenced to V
CC(A)
and pins Bn are
referenced to V
CC(B)
. A HIGH on DIR allows transmission from An to Bn and a LOW on
DIR allows transmission from Bn to An. The output enable input (OE
) can be used to
disable the outputs so the buses are effectively isolated.
The device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing any damaging backflow current through the
device when it is powered down. In suspend mode when either V
CC(A)
or V
CC(B)
are at
GND level, both An and Bn are in the high-impedance OFF-state.
2. Features and benefits
Wide supply voltage range:
V
CC(A)
: 0.8 V to 3.6 V
V
CC(B)
: 0.8 V to 3.6 V
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114E Class 3B exceeds 8000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101C exceeds 1000 V
Maximum data rates:
380 Mbit/s ( 1.8 V to 3.3 V translation)
260 Mbit/s ( 1.1 V to 3.3 V translation)
260 Mbit/s ( 1.1 V to 2.5 V translation)
210 Mbit/s ( 1.1 V to 1.8 V translation)
150 Mbit/s ( 1.1 V to 1.5 V translation)
100 Mbit/s ( 1.1 V to 1.2 V translation)
74AVC8T245
8-bit dual supply translating transceiver with configurable
voltage translation; 3-state
Rev. 5 — 27 December 2012 Product data sheet
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