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AD5383BST-5 数据手册 - ADI（亚德诺）
制造商:
ADI（亚德诺）
分类:
DA转换器
封装:
LQFP
描述:
32通道， 14位，并行和串行输入，双极性电压输出DAC 32-Channel, 14-Bit, Parallel and Serial Input, Bipolar Voltage Output DAC
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AD5383BST-5数据手册
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of 40 Go
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AD5383
Rev. A | Page 14 of 40
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
RESET
DB5
DB4
DB3
DB2
DB1
DB0
NC
NC
REG0
REG1
V
OUT
23
V
OUT
22
V
OUT
21
V
OUT
20
AV
DD
3
AGND3
DAC_GND3
SIGNAL_GND3
V
OUT
19
V
OUT
18
V
OUT
17
V
OUT
16
AV
DD
2
AGND2
59
74
75
69
70
71
72
67
68
66
73
64
65
60
61
62
63
57
58
55
56
53
54
52
51
NC
NC
NC
NC
V
OUT
5
V
OUT
6
V
OUT
7
NC
NC
MON_IN1
MON_IN2
MON_IN3
MON_IN4
NC
MON_OUT
V
OUT
8
V
OUT
9
V
OUT
10
V
OUT
11
V
OUT
12
DAC_GND2
SIGNAL_GND2
V
OUT
13
V
OUT
14
V
OUT
15
26
28
27
29
30
32
33
34
35
36
31
37
38
39
40
42
43
44
45
41
46
47
48
49
50
CS/(SYNC/AD0)
DB11/(DIN/SDA)
DB10/(SCLK/SCL)
DB9/(SPI/I
2
C)
DB8
DB7
DB6
SDO(A/B)
DV
DD
DGND
DGND
NC
A4
A3
A2
A1
A0
DV
DD
DV
DD
DGND
SER/PAR
PD
WR (DCEN/AD1)
LDAC
BUSY
100
98
99
97
96
95
94
92
91
90
89
88
87
93
86
85
84
82
81
80
79
78
77
76
83
5
4
3
2
7
6
9
8
1
14
13
12
11
16
15
17
10
19
18
23
22
21
20
24
25
FIFO EN
CLR
V
OUT
24
V
OUT
25
V
OUT
26
V
OUT
27
SIGNAL_GND4
DAC_GND4
AGND4
AV
DD
4
V
OUT
28
V
OUT
29
V
OUT
30
V
OUT
31
REF GND
REFOUT/REFIN
SIGNAL_GND1
DAC_GND1
AV
DD
1
V
OUT
0
V
OUT
1
V
OUT
2
V
OUT
3
V
OUT
4
AGND1
PIN 1
IDENTIFIER
AD5383
TOP VIEW
(Not to Scale)
03734-008
Figure 8. 100-Lead LQFP Pin Configuration
Table 10. Pin Function Descriptions
Mnemonic Function
V
OUT
x
Buffered Analog Outputs for Channel x. Each analog output is driven by a rail-to-rail output amplifier operating at a
gain of 2. Each output is capable of driving an output load of 5 kΩ to ground. Typical output impedance is 0.5 Ω.
SIGNAL_GND(1 to 4)
Analog Ground Reference Points for Each Group of Eight Output Channels. All SIGNAL_GND pins are tied together
internally and should be connected to the AGND plane as close as possible to the AD5383.
DAC_GND(1 to 4)
Each Group of Eight Channels Contains a DAC_GND Pin. This is the ground reference point for the internal 12-bit
DAC. These pins shound be connected to the AGND plane.
AGND(1 to 4)
Analog Ground Reference Point. Each group of eight channels contains an AGND pin. All AGND pins should be
connected externally to the AGND plane.
AV
DD
(1 to 4)
Analog Supply Pins. Each group of eight channels has a separate AV
DD
pin. These pins are connected together
internally and should be decoupled with a 0.1 µF ceramic capacitor and a 10 µF tantalum capacitor. Operating
range for the AD5383-5 is 4.5 V to 5.5 V; operating range for the AD5383-3 is 2.7 V to 3.6 V.
DGND Ground for All Digital Circuitry.
DV
DD
Logic Power Supply. Guaranteed operating range is 2.7 V to 5.5 V. It is recommended that these pins be decoupled
with 0.1 µF ceramic and 10 µF tantalum capacitors to DGND.
REF GND Ground Reference Point for the Internal Reference.
REFOUT/REFIN
The AD5383 Contains a Common REFOUT/REFIN Pin. When the internal reference is selected, this pin is the
reference output. If the application requires an external reference, it can be applied to this pin and the internal
reference can be disabled via the control register. The default for this pin is a reference input.
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