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AD5383BST-5 数据手册 - ADI（亚德诺）
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ADI（亚德诺）
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DA转换器
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LQFP
描述:
32通道， 14位，并行和串行输入，双极性电压输出DAC 32-Channel, 14-Bit, Parallel and Serial Input, Bipolar Voltage Output DAC
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AD5383BST-5数据手册
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AD5383
Rev. A | Page 2 of 40
TABLE OF CONTENTS
General Description......................................................................... 3
Specifications..................................................................................... 4
AD5383-5 Specifications............................................................. 4
AD5383-3 Specifications............................................................. 6
AC Characteristics........................................................................ 7
Timing Characteristics..................................................................... 8
Serial Interface Timing ................................................................ 8
I
2
C Serial Interface Timing........................................................ 10
Parallel Interface Timing........................................................... 11
Absolute Maximum Ratings.......................................................... 13
ESD CAUTION .......................................................................... 13
Pin Configuration and Function Descriptions........................... 14
Terminology .................................................................................... 17
Typical Performance Characteristics ........................................... 18
Functional Description.................................................................. 21
DAC Architecture—General..................................................... 21
Data Decoding............................................................................ 21
On-Chip Special Function Registers (SFR) ............................ 22
SFR Commands.......................................................................... 22
Hardware Functions....................................................................... 25
Reset Function ............................................................................ 25
Asynchronous Clear Function.................................................. 25
BUSY
and
LDAC
Functions...................................................... 25
FIFO Operation in Parallel Mode............................................ 25
Power-On Reset.......................................................................... 25
Power-Down ............................................................................... 25
Interfaces.......................................................................................... 26
DSP-, SPI-, MICROWIRE-Compatible Serial Interfaces ..... 26
I
2
C Serial Interface ..................................................................... 28
Parallel Interface......................................................................... 30
Microprocessor Interfacing....................................................... 31
Application Information................................................................ 33
Power Supply Decoupling......................................................... 33
Typical Configuration Circuit .................................................. 33
Channel Monitor Function....................................................... 34
Toggle Mode Function............................................................... 34
Thermal Monitor Function....................................................... 34
Optical Attenuators.................................................................... 35
Utilizing the FIFO...................................................................... 36
Outline Dimensions....................................................................... 37
Ordering Guide .......................................................................... 37
REVISION HISTORY
3/05 — Rev. 0 to Rev. A
Changes to Table 1............................................................................ 3
Changes to Table 3............................................................................ 6
Change to Table 5 ............................................................................. 7
Change to Table 18 ......................................................................... 24
5/04 — Revision 0: Initial Version
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