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器件3D模型￥ 9.828
AD823ARZ 数据手册 - ADI（亚德诺）
制造商:
ADI（亚德诺）
分类:
运算放大器
封装:
SOIC-8
描述:
ANALOG DEVICES AD823ARZ 运算放大器, 双路, 16 MHz, 2个放大器, 25 V/µs, ± 1.5V 至 ± 18V, SOIC, 8 引脚
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AD823ARZ数据手册
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AD823 Data Sheet
Rev. E | Page 14 of 20
OUTPUT IMPEDANCE
The low frequency open-loop output impedance of the common-
emitter output stage used in this design is approximately 30 kΩ.
Although this is significantly higher than a typical emitter
follower output stage, when it is connected with feedback, the
output impedance is reduced by the open-loop gain of the op
amp. With 109 dB of open-loop gain, the output impedance is
reduced to <0.2 Ω. At higher frequencies, the output impedance
rises as the open-loop gain of the op amp drops; however, the
output also becomes capacitive due to the integrator capacitors
C1 and C2. This prevents the output impedance from ever
becoming excessively high (see Figure 18), which can cause
stability problems when driving capacitive loads. In fact, the AD823
has excellent cap-load drive capability for a high frequency op
amp. Figure 34 shows the AD823 connected as a follower while
driving 470 pF direct capacitive load. Under these conditions,
the phase margin is approximately 20°. If greater phase margin
is desired, a small resistor can be used in series with the output
to decouple the effect of the load capacitance from the op amp
(see Figure 26). In addition, running the part at higher gains
also improves the capacitive load drive capability of the op amp.
V
OUT
S1N
C1
S1P
C5R1
R1
g
m
VI
g
m
VI
g
m2
C2
R2
00901-037
Figure 37. Small Signal Schematic
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