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0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
100 200 300 400 500
Frequency (MHz)
Differential Input Resistance, Rin (k)
G037
0
1
2
3
4
5
6
100 200 300 400 500
Frequency (MHz)
Differential Input Capacitance, Cin (pF)
G038
XINP
(1)
XINM
(1)
R
IN
Z
IN
(2)
C
IN
41
ADS4449
www.ti.com
SBAS603A APRIL 2013REVISED JANUARY 2016
Product Folder Links: ADS4449
Submit Documentation FeedbackCopyright © 2013–2016, Texas Instruments Incorporated
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
Typical applications involving transformer-coupled circuits are discussed in this section. Transformers (such as
ADT1-1WT or WBC1-1) can be used up to 250 MHz to achieve good phase and amplitude balances at ADC
inputs. While designing the dc driving circuits, the ADC input impedance must be considered. Figure 51 shows
that ADC input impedance is represented by parallel combination of resistance and capacitance.
(1) X = A, B, C, or D.
(2) Z
IN
= R
IN
|| (1 / jωC
IN
).
Figure 51. ADC Equivalent Input Impedance
Figure 52 and Figure 53 show how input impedance (ZIN= RIN|| CIN) varies over input frequency.
Figure 52. ADC Analog Input Resistance (R
IN
) vs
Frequency
Figure 53. ADC Analog Input Capacitance (C
IN
) vs
Frequency
9.2 Typical Application
Depending on the input frequency, sampling rate, and input amplitude, one of these metrics plays a dominant
part in limiting performance. At very high input frequencies, SFDR is determined largely by the device sampling
circuit nonlinearity. At low input amplitudes, the quantizer nonlinearity typically limits performance. Glitches are
caused by opening and closing the sampling switches. The driving circuit should present a low source
impedance to absorb these glitches, otherwise these glitches may limit performance. A low impedance path
between the analog input terminals and VCM is required from the common-mode switching currents perspective
as well. This impedance can be achieved by using two resistors from each input terminated to the common-mode

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ADS4449 数据手册

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