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DG417LDY-E3 数据手册 - VISHAY（威世）
制造商:
VISHAY（威世）
分类:
模拟开关芯片
封装:
SOIC
描述:
精密单片低电压CMOS模拟开关 Precision Monolithic Low-Voltage CMOS Analog Switches
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DG417LDY-E3数据手册
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若手册格式错乱，请下载阅览PDF原文件
Document Number: 71763
S-60104–Rev. D, 23-Jan-06
www.vishay.com
3
Vishay Siliconix
DG417L/418L/419L
SPECIFICATIONS (DUAL SUPPLY ± 5 V)
Parameter Symbol
Test Conditions
Unless Otherwise Specified
V+ = 5 V, V- = - 5 V
V
L
= 5 V, V
IN
= 2.4 V, 0.8 V
f
Temp
b
Typ
c
A Suffix Limits
- 55 to 125 °C
D Suffix Limits
- 40 to 85 °C
Unit
Min
d
Max
d
Min
d
Max
d
Analog Switch
Analog Signal Range
e
V
ANALOG
Full - 55- 55V
On–Resistance
r
ON
V+ = 5 V, V- = - 5 V
I
NO
, I
NC
= 5 mA, V
COM
= ± 3.5 V
Room
Full
14 18.5
30
18.5
21
Ω
Switch Off
Leakage Current
a
I
NO(off)
I
NC(off)
V+ = 5.5 , V- = - 5.5 V
V
COM
= ± 4.5 V
V
NO
, V
NC
= ± 4.5 V
Room
Full
- 1
- 15
1
15
- 1
- 10
1
10
nA
I
COM(off)
Room
Full
- 1
- 15
1
15
- 1
- 10
1
10
Channel On
Leakage Current
a
I
COM(on)
V+ = 5.5 V, V- = - 5.5 V
V
NO
, V
NC
= V
COM
= ± 4.5 V
Room
Full
- 1
- 15
1
15
- 1
- 10
1
10
Digital Control
Input Current
a
I
INL
or I
INH
Full 0.05 - 1.5 1.5 - 1 1 µA
Dynamic Characteristics
Tu r n - O n T i m e
e
t
ON
R
L
= 300 Ω, C
L
= 35 pF
V
NO
, V
NC
= ± 3.5 V, See Figure 2
Room
Full
30 41
50
41
44
ns
Turn-Off Time
e
t
OFF
Room
Full
16 32
36
32
33
Break-Before-Make Time
Delay
e
t
D
DG419L Only, V
NO
, V
NC
= 3.5 V
R
L
= 300 Ω, C
L
= 35 pF
Room 10
TransitionTime
t
TRANS
R
L
= 300 Ω, C
L
= 35 pF
V
S1
= ± 3.5 V, V
S2
= ± 3.5 V
Room 33 47 47
Charge Injection
e
Q
INJ
V
g
= 0 V, R
g
= 0 Ω, C
L
= 1 nF
Room 3 pC
Off-Isolation
e
OIRR
R
L
= 50 Ω, C
L
= 5 pF , f = 1 MHz
Room - 71
dB
Channel-to-Channel
Crosstalk
e
X
TALK
Room - 76
Source Off Capacitance
e
C
NO(off)
C
NC(off)
f = 1 MHz
Room 5.2
pF
Channel-On Capacitance
e
C
ON
Room 15
Power Supplies
Positive Supply Current
e
I+
V
IN
= 0 or V
L
Room
Full
0.03 1
7.5
1
5
µA
Negative Supply Current
e
I-
Room
Full
- 0.002 - 1
- 7.5
- 1
- 5
Logic Supply Current
e
I
L
Room
Full
0.002 1
7.5
1
5
Ground Current
e
I
GND
Room
Full
- 0.002 - 1
- 7.5
- 1
- 5
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