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F12N10L 数据手册 - Fairchild（飞兆/仙童）
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F12N10L数据手册
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©2002 Fairchild Semiconductor Corporation RFP12N10L Rev. B
FIGURE 7. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
FIGURE 8. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
NOTE: Refer to Fairchild Applications Notes AN7254 and AN7260
FIGURE 9. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT
Test Circuits and Waveforms
FIGURE 10. SWITCHING TIME TEST CIRCUIT FIGURE 11. RESISTIVE SWITCHING WAVEFORMS
Typical Performance Curves
Unless Otherwise Specified
(Continued)
1.3
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0 50 100 150-50
V
DS
= V
GS
I
D
= 250µA
NORMALIZED GATE
T
J
, JUNCTION TEMPERATURE (
o
C)
THRESHOLD VOLTAGE (V)
1.2
800
600
400
200
0
01020304050
C
ISS
C
OSS
C
RSS
C, CAPACITANCE (pF)
V
DS,
DRAIN TO SOURCE VOLTAGE (V)
V
GS
= 0V, f = 1MHz
C
ISS
= C
GS
+ C
GD
C
RSS
= C
GD
C
OSS
≈ C
DS
+ C
GD
0.75BV
DSS
0.50BV
DSS
0.25BV
DSS
DRAIN SOURCE
VOLTAGE
GATE
SOURCE
VOLTAGE
R
L
= 8.33Ω
I
G (REF)
= 0.56mA
V
GS
= 5V
V
DD
= BV
DSS
V
DD
= BV
DSS
BV
DSS
I
G
(REF)
I
G
(ACT)
20 80
I
G
(REF)
I
G
(ACT)
t, TIME (µs)
GATE TO SOURCE VOLTAGE (V)
DRAIN TO SOURCE VOLTAGE (V)
100
75
50
25
0
10
8
6
4
0
2
V
GS
R
L
R
G
DUT
+
-
V
DD
t
ON
t
d(ON)
t
r
90%
10%
V
DS
90%
10%
t
f
t
d(OFF)
t
OFF
90%
50%
50%
10%
PULSE WIDTH
V
GS
0
0
RFP12N10L
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