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LP2950-30 数据手册 - TI（德州仪器）
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TI（德州仪器）
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TO-92-3
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LP2950-30数据手册
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Output Load
100 mA/div
Output Voltage
100 mV/div
LP2950
,
LP2951
SLVS582I –APRIL 2006–REVISED NOVEMBER 2014
www.ti.com
Typical Application (continued)
8.2.2.4 ESR Range
The regulator control loop relies on the ESR of the output capacitor to provide a zero to add sufficient phase
margin to ensure unconditional regulator stability; this requires the closed-loop gain to intersect the open-loop
response in a region where the open-loop gain rolls off at 20 dB/decade. This ensures that the phase is always
less than 180° (phase margin greater than 0°) at unity gain. Thus, a minimum-maximum range for the ESR must
be observed.
The upper limit of this ESR range is established by the fact that an ESR that is too high could result in the zero
occurring too soon, causing the gain to roll off too slowly. This, in turn, allows a third pole to appear before unity
gain and introduces enough phase shift to cause instability. This typically limits the maximum ESR to
approximately 5 Ω.
Conversely, the lower limit of the ESR range is tied to the fact that an ESR that is too low shifts the zero too far
out, past unity gain, which allows the gain to roll off at 40 dB/decade at unity gain, resulting in a phase shift of
greater than 180°. Typically, this limits the minimum ESR to approximately 20 mΩ to 30 mΩ.
For specific ESR requirements, see Typical Characteristics.
8.2.3 Application Curves
Figure 34. Load Transient Response vs Time (V
OUT
= 5 V, C
L
= 1 µF)
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