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器件3D模型￥ 53.715
MAX17036GTL+ 数据手册 - Maxim Integrated（美信）
制造商:
Maxim Integrated（美信）
分类:
稳压芯片
封装:
WFQFN-40
描述:
1/2/ 3相Quick -PWM IMVP- 6.5 VID控制器 1/2/3-Phase Quick-PWM IMVP-6.5 VID Controllers
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P1P12P13P14P15P16Hot
典型应用电路图在P19
封装尺寸在P38
型号编码规则在P1
功能描述在P1
技术参数、封装参数在P9
应用领域在P1P17P37
电气规格在P3P4P5P6P7P8P9P20P21P22P23P27
导航目录
MAX17036GTL+数据手册
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MAX17030/MAX17036
1/2/3-Phase Quick-PWM
IMVP-6.5 VID Controllers
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V
IN
= 10V, V
CC
= V
DD
= V
SHDN
= V
PGD_IN
= V
PSI
= V
ILIM
= 5V, V
DPRSLPVR
= V
GNDS
= 0, V
CSP_
= V
CSN_
=
1.0000V, FB = FBAC, R
FBAC
= 3.57kΩ from FBAC to CSN_, [D6–D0] = [0101000]; T
A
= 0°C to +85°C, unless otherwise noted.
Typical values are at T
A
= +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
PWRGD Startup Delay
Measured at startup from the time when
CLKEN goes low
3 6.5 10 ms
Lower threshold,
falling edge
(undervoltage)
-350 -300 -250
CLKEN and PWRGD Threshold
Measured at FB
with respect to the
voltage target set
by the VID code
(see Table 4), 20mV
hysteresis (typ)
Upper threshold,
rising edge
(overvoltage)
+150 +200 +250
mV
CLKEN and PWRGD Delay
FB forced 25mV outside the PWRGD trip
thresholds
10 μs
CLKEN and PWRGD Transition
Blanking Time (VID Transitions)
t
BLANK
Measured from the time when FB reaches
the target voltage (Note 3)
20 μs
CLKEN, PWRGD Output
Low Voltage
Low state, I
SINK
= 3mA 0.4 V
CLKEN, PWRGD Leakage
Current
High-Z state, pin forced to 5V, T
A
= +25°C 1 μA
CSN1 Pulldown Resistance in
UVLO and Shutdown
SHDN = GND, measured after soft-
shutdown completed (DL = low)
8
V
CC
Undervoltage-Lockout
Threshold
V
UVLO(VCC)
Rising edge, 65mV typical hysteresis,
controller disabled below this level
4.05 4.27 4.48 V
THERMAL PROTECTION
VRHOT Trip Threshold
Measured at THRM with respect to V
CC
;
falling edge, typical hysteresis = 75mV
29 30 31 %
VRHOT Delay t
VRHOT
THRM forced 25mV below the VRHOT trip
threshold, falling edge
10 μs
VRHOT Output On-Resistance R
ON(VRHOT)
Low state 2 8
VRHOT Leakage Current High-Z state, VRHOT forced to 5V, T
A
= +25°C 1 μA
THRM Input Leakage I
THRM
V
THRM
= 0 to 5V, T
A
= +25°C -0.1 +0.1 μA
Thermal-Shutdown Threshold T
SHDN
Typical hysteresis = 15°C +160 °C
VALLEY CURRENT LIMIT, DROOP, CURRENT BALANCE, AND CURRENT MONITOR
V
TIME
- V
ILIM
= 100mV 7 10 13
V
TIME
- V
ILIM
= 500mV 45 50 55
Current-Limit Threshold Voltage
(Positive)
V
LIMIT
V
CSP_
- V
CSN_
ILIM = V
CC
20 22.5 25
mV
Current-Limit Threshold Voltage
(Negative) Accuracy
V
LIMIT(NEG)
V
CSP_
- V
CSN_
, nominally -125% of V
LIMIT
-4 +4 mV
Current-Limit Threshold Voltage
(Zero Crossing)
V
ZX
V
GND
- V
LX_
, V
DPRSLPVR
= 5V 0 mV
CSP_, CSN_ Common-Mode
Input Range
0 2 V
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