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MAX1904ETJ+T 数据手册 - Maxim Integrated(美信)
制造商:
Maxim Integrated(美信)
分类:
稳压芯片
封装:
TQFN-32
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P1P9P10P30Hot
典型应用电路图在P1P14P24
原理图在P15P16
封装尺寸在P31P32P33
型号编码规则在P1
功能描述在P1
技术参数、封装参数在P6
应用领域在P1P20P24
电气规格在P3P4P5P6P21P23P24
导航目录
MAX1904ETJ+T数据手册
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MAX1901/MAX1902/MAX1904
500kHz Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
6 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V+ = 15V, both PWMs on, SYNC = V
L
, V
L
load = 0, REF load = 0, SKIP = 0, T
A
= -40°C to +85°C, unless otherwise noted.) (Note 7)
PARAMETER CONDITIONS MIN TYP MAX UNITS
V+ Standby Supply Current
V+ = 5.5V to 30V, both SMPSs off, includes
current into SHDN
60 µA
V+ Standby Supply Current in Dropout
V+ = 4.2V to 5.5V, both SMPSs off, includes
current into SHDN
200 µA
V+ Shutdown Supply Current V+ = 4.0V to 30V, SHDN = 0 10 µA
(Note 3) 4
Quiescent Power Consumption
Both SMPSs enabled,
FB3 = FB5 = 0,
CSL3 = CSH3 = 3.5V,
CSL5 = CSH5 = 5.3V
MAX1901/MAX1904 4
mW
FAULT DETECTION (MAX1901/MAX1902)
Overvoltage Trip Threshold With respect to unloaded output voltage 4 10 %
Output Undervoltage Threshold With respect to unloaded output voltage 60 80 %
Output Undervoltage Lockout Time
From each SMPS enabled, with respect to
f
OSC
5,000 7,000 clks
RESET
RESET Trip Threshold
With respect to unloaded output voltage,
falling edge; typical hysteresis = 1%
-7 -4
RESET Delay Time With respect to f
OSC
27,000 37,000
%
clks
INPUTS AND OUTPUTS
Feedback-Input Leakage Current FB3, FB5; SECFB = 2.6V 50 nA
Logic Input-Low Voltage
RUN/ON3, SKIP, TIME/ON5 (SEQ = REF),
SHDN, STEER, SYNC
0.6 V
Logic Input-High Voltage
RUN/ON3, SKIP, TIME/ON5 (SEQ = REF),
SHDN, STEER, SYNC
2.4 V
Logic Output-Low Voltage RESET, I
SINK
= 4mA 0.4 V
Logic Output-High Current RESET = 3.5V 1 mA
TIME/ON5 Input Trip Level SEQ = 0 or V
L
2.4 2.6 V
TIME/ON5 Source Current TIME/ON5 = 0, SEQ = 0 or V
L
2.5 3.5 µA
TIME/ON5 On-Resistance TIME/ON5; RUN/ON3 = 0, SEQ = 0 or V
L
80 Ω
SSOP package 7
Gate-Driver On-Resistance High or low (Note 6)
QFN package 8
Ω
Note 1: Each of the four digital soft-start levels is tested for functionality; the steps are typically in 20mV increments.
Note 2: High duty-factor operation supports low input-to-output differential voltages, and is achieved at a lowered operating frequency
(see the Dropout Operation section).
Note 3: MAX1902 only.
Note 4: Off mode for the 12V linear regulator occurs when the SMPS that has flyback feedback (V
DD
) steered to it is disabled. In situa-
tions where the main outputs are being held up by external keep-alive supplies, turning off the 12OUT regulator prevents a leak-
age path from the output-referred flyback winding, through the rectifier, and into V
DD
.
Note 5: Since the reference uses V
L
as its supply, the reference’s V+ line-regulation error is insignificant.
Note 6: Production testing limitations due to package handing require relaxed maximum on-resistance specifications for the thin
QFN package. The SSOP and thin QFN package contain the same die, and the thin QFN package imposes no additional
resistance incircuit.
Note 7: Specifications from to 0°C to -40°C are guaranteed by design, not production tested.
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