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MC74VHC373M 数据手册 - ON Semiconductor(安森美)
制造商:
ON Semiconductor(安森美)
分类:
锁存器
封装:
SOP
描述:
八D型锁存器具有三态输出 Octal D-Type Latch with 3-State Output
Pictures:
3D模型
符号图
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MC74VHC373M数据手册
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MC74VHC373
http://onsemi.com
4
AC ELECTRICAL CHARACTERISTICS (Input t
r
= t
f
= 3.0ns)
Symbol Unit
T
A
= − 40 to 85°CT
A
= 25°C
Test ConditionsParameter
Symbol Unit
MaxMinMaxTypMin
Test ConditionsParameter
C
in
Maximum Input Capacitance 4 10 10 pF
C
out
Maximum Three−State Output
Capacitance (Output in
High−Impedance State)
6 pF
C
PD
Power Dissipation Capacitance (Note 2)
Typical @ 25°C, V
CC
= 5.0 V
pF
27
1. Parameter guaranteed by design. t
OSLH
= |t
PLHm
− t
PLHn
|, t
OSHL
= |t
PHLm
− t
PHLn
|.
2. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
)
= C
PD
V
CC
f
in
+ I
CC
/8 (per latch). C
PD
is used to determine the
no−load dynamic power consumption; P
D
= C
PD
V
CC
2
f
in
+ I
CC
V
CC
.
NOISE CHARACTERISTICS (Input t
r
= t
f
= 3.0ns, C
L
= 50 pF, V
CC
= 5.0V)
Symbol
Parameter
T
A
= 25°C
Unit
Typ Max
V
OLP
Quiet Output Maximum Dynamic V
OL
0.6 0.9 V
V
OLV
Quiet Output Minimum Dynamic V
OL
− 0.6 − 0.9 V
V
IHD
Minimum High Level Dynamic Input Voltage 3.5 V
V
ILD
Maximum Low Level Dynamic Input Voltage 1.5 V
TIMING REQUIREMENTS (Input t
r
= t
f
= 3.0 ns)
Symbol
Parameter Test Conditions
T
A
= 25°C
T
A
= − 40
to 85°C
Unit
Typ Limit Limit
t
w(h)
Minimum Pulse Width, LE V
CC
= 3.3 ± 0.3 V
V
CC
= 5.0 ±0.5 V
5.0
5.0
5.0
5.0
ns
t
su
Minimum Setup Time, D to LE V
CC
= 3.3 ± 0.3 V
V
CC
= 5.0 ± 0.5 V
4.0
4.0
4.0
4.0
ns
t
h
Minimum Hold Time, D to LE V
CC
= 3.3 ± 0.3 V
V
CC
= 5.0 ± 0.5 V
1.0
1.0
1.0
1.0
ns
ORDERING INFORMATION
Device Package Shipping
†
MC74VHC373DWR2G SOIC−20
(Pb−Free)
1000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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