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器件3D模型￥ 7.933
PCF8574APWRG4 数据手册 - TI（德州仪器）
制造商:
TI（德州仪器）
分类:
接口芯片
封装:
TSSOP-20
描述:
远程8位I / O扩展器I2C总线 REMOTE 8-BIT I/O EXPANDER FOR I2C BUS
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P3Hot
典型应用电路图在P15P16P17
原理图在P11P12P15
封装尺寸在P22P23P24P25
标记信息在P22P23
封装信息在P21P22P23P24P25
技术参数、封装参数在P4
应用领域在P1P35
电气规格在P5
导航目录
PCF8574APWRG4数据手册
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C
b
(pF)
R
p(max)
(kOhm)
0 50 100 150 200 250 300 350 400 450
0
5
10
15
20
25
D008
Standard-mode
Fast-mode
V
CC
(V)
R
p(min)
(kOhm)
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
D009
V
CC
> 2V
V
CC
<= 2
r
p(max)
b
R
0.8473 C
t
=
´
CC OL(max)
p(min)
OL
V V
R
I
-
=
PCF8574A
www.ti.com
SCPS069F –JULY 2001–REVISED NOVEMBER 2015
Typical Application (continued)
9.2.2 Detailed Design Procedure
The pull-up resistors, R
P
, for the SCL and SDA lines need to be selected appropriately and take into
consideration the total capacitance of all slaves on the I
2
C bus. The minimum pull-up resistance is a function of
V
CC
, V
OL,(max)
, and I
OL
:
(1)
The maximum pull-up resistance is a function of the maximum rise time, t
r
(300 ns for fast-mode operation, f
SCL
=
400 kHz) and bus capacitance, C
b
:
(2)
The maximum bus capacitance for an I
2
C bus must not exceed 400 pF for standard-mode or fast-mode
operation. The bus capacitance can be approximated by adding the capacitance of the PCF8574A device, C
i
for
SCL or C
io
for SDA, the capacitance of wires/connections/traces, and the capacitance of additional slaves on the
bus.
9.2.3 Application Curves
Standard-mode Fast-mode V
OL
= 0.2*V
CC
, I
OL
= 2 mA when V
CC
≤ 2 V
(f
SCL
= 100 kHz, t
r
= 1 µs) (f
SCL
= 400 kHz, t
r
= 300 ns)
V
OL
= 0.4 V, I
OL
= 3 mA when V
CC
> 2 V
Figure 21. Maximum Pull-Up Resistance (R
p(max)
)
Figure 22. Minimum Pull-Up Resistance (R
p(min)
)
vs Bus Capacitance (C
b
)
vs Pull-Up Reference Voltage (V
CC
)
Copyright © 2001–2015, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: PCF8574A
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