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器件3D模型￥ 61.645
PIC18LF4620T-I/PT 数据手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
微控制器
封装:
TQFP-44
描述:
PIC18 系列 3968 B RAM 64 kB 闪存 8位 增强型 微控制器 - TQFP-44
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P4P5P142P143P144P150Hot
典型应用电路图在P167
原理图在P10P12P13P27P43P108P126P130P136P138P143P144
封装尺寸在P387
标记信息在P385P386
封装信息在P385
技术参数、封装参数在P338P340P343P344P345
应用领域在P154P248
电气规格在P9P10P75P236P237P241P242P245
导航目录
PIC18LF4620T-I/PT数据手册
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若手册格式错乱，请下载阅览PDF原文件
PIC18F2525/2620/4525/4620
DS39626E-page 120 © 2008 Microchip Technology Inc.
10.5 RCON Register
The RCON register contains flag bits which are used to
determine the cause of the last Reset or wake-up from
Idle or Sleep modes. RCON also contains the IPEN bit
which enables interrupt priorities.
The operation of the SBOREN bit and the Reset flag
bits is discussed in more detail in Section 4.1 “RCON
Register”.
REGISTER 10-10: RCON: RESET CONTROL REGISTER
R/W-0 R/W-1
(1)
U-0 R/W-1 R-1 R-1 R/W-0
(1)
R/W-0
IPEN SBOREN
—RITO PD POR BOR
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 IPEN: Interrupt Priority Enable bit
1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupts (PIC16CXXX Compatibility mode)
bit 6 SBOREN: Software BOR Enable bit
(1)
For details of bit operation, see Register 4-1.
bit 5 Unimplemented: Read as ‘0’
bit 4 RI: RESET Instruction Flag bit
For details of bit operation, see Register 4-1.
bit 3 TO: Watchdog Timer Time-out Flag bit
For details of bit operation, see Register 4-1.
bit 2 PD: Power-Down Detection Flag bit
For details of bit operation, see Register 4-1.
bit 1 POR: Power-on Reset Status bit
(1)
For details of bit operation, see Register 4-1.
bit 0 BOR: Brown-out Reset Status bit
For details of bit operation, see Register 4-1.
Note 1: Actual Reset values are determined by device configuration and the nature of the device Reset. See
Register 4-1 for additional information.
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