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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN74LVC1G11
SCES487H SEPTEMBER 2003REVISED NOVEMBER 2016
SN74LVC1G11 Single 3-Input Positive-AND Gate
1
1 Features
1
Latch-Up Performance Exceeds 100 mA
Per JESD 78, Class II
ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
1000-V Charged-Device Model (C101)
Available in the Texas Instruments
NanoFree™ Package
Supports 5-V V
CC
Operation
Inputs Accept Voltages to 5.5 V
Maximum t
pd
of 4.1 ns at 3.3 V
Low Power Consumption, 10-μA Maximum I
CC
±24-mA Output Drive at 3.3 V
I
off
Supports Partial-Power-Down Mode Operation
2 Applications
AV Receivers
DLP Front Projection System
Digital Picture Frames
Digital Radio
Digital Still Cameras
Digital Video Cameras (DVC)
Embedded PCs
E-Books
Ethernet Switchs
GPS: Personal Navigation Devices
Handset: Smartphones
High-Speed Data Acquisition and Generation
Military: Radar and Sonar
Mobile Internet Devices
Notebook PC and Netbooks
Network-Attached Storage (NAS)
Power Line Communication Modems
Server PSU
STB, DVR, and Streaming Media
Speakers: USB
Tablets: Enterprise
Video Broadcasting and Infrastructure: Scalable
Platform and IP-Based Multi-Format Transcoders
Wireless Headsets, Keyboards, and Mice
3 Description
The SN74LVC1G11 performs the Boolean function
in positive logic.
NanoFree package technology is a major
breakthrough in IC packaging concepts, using the die
as the package.
This device is fully specified for partial-power-down
applications using I
off
. The I
off
circuitry disables the
outputs, preventing damaging current backflow
through the device when it is powered down.
Device Information
(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
SN74LVC1G11DBV SOT-23 (6) 2.90 mm × 1.60 mm
SN74LVC1G11DCK SC70 (6) 2.00 mm × 1.25 mm
SN74LVC1G11DRY SON (6) 1.45 mm × 1.00 mm
SN74LVC1G11DSF SON (6) 1.00 mm × 1.00 mm
SN74LVC1G11YZP DSBGA (6) 1.41 mm × 0.91 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Logic Diagram (Positive Logic)

SN74LVC1G11DSFR 数据手册

TI(德州仪器)
30 页 / 1.28 MByte
TI(德州仪器)
6 页 / 0.26 MByte

SN74LVC1G11 数据手册

TI(德州仪器)
单路 3 输入正与门
TI(德州仪器)
TEXAS INSTRUMENTS  SN74LVC1G11DBVR.  芯片, 单路与门, 3输入, SOT-23-6, 整卷
TI(德州仪器)
TEXAS INSTRUMENTS  SN74LVC1G11DCKR.  逻辑芯片, 单路3输入与门, SC70-6
TI(德州仪器)
单3输入正与门 SINGLE 3-INPUT POSITIVE-AND GATE
TI(德州仪器)
单3输入正与门 SINGLE 3-INPUT POSITIVE-AND GATE
TI(德州仪器)
单3输入正与门 SINGLE 3-INPUT POSITIVE AND GATE
TI(德州仪器)
74LVC1G 系列,Texas Instruments低电压 CMOS 逻辑 单门封装 工作电压:1.65 - 5.5 兼容性:输入 LVTTL/TTL、输出 LVCMOS 按 JESD 78 II 级标准,闩锁效应性能超过 100 mA。 ESD 保护超乎 JESD 22 标准 ### 74LVC 系列
TI(德州仪器)
单3输入正与门 SINGLE 3-INPUT POSITIVE-AND GATE
TI(德州仪器)
单路 3 输入正与门 6-SON -40 to 125
TI(德州仪器)
单3输入正与门 SINGLE 3-INPUT POSITIVE-AND GATE
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