Datasheet 搜索 > 微控制器 > ST Microelectronics（意法半导体） > STM32F100RBT6B 数据手册 > STM32F100RBT6B 数据手册 71/95 页
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STM32F100RBT6B 数据手册 - ST Microelectronics（意法半导体）
制造商:
ST Microelectronics（意法半导体）
分类:
微控制器
封装:
LQFP-64
描述:
STMICROELECTRONICS STM32F100RBT6B 微控制器, 32位, 线路接入, ARM 皮质-M3, 24 MHz, 128 KB, 8 KB, 64 引脚, LQFP
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P22P23P24P25P26P27P28P29Hot
典型应用电路图在P48P50P71
封装尺寸在P76
型号编码规则在P89P90P91
封装信息在P76P77P78P79P80P81P82P83P84P85P86P87
技术参数、封装参数在P33P55
电气规格在P31P32P33P34P35P36P37P38P39P40P41P42
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STM32F100RBT6B数据手册
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DocID16455 Rev 8 71/95
STM32F100x4, STM32F100x6, STM32F100x8, STM32F100xB Electrical characteristics
94
Figure 32. ADC accuracy characteristics
Figure 33. Typical connection diagram using the ADC
1. Refer to Table 42 for the values of R
AIN
, R
ADC
and C
ADC
.
2. C
parasitic
represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the
pad capacitance (roughly 7
pF). A high C
parasitic
value will downgrade conversion accuracy. To remedy
this, f
ADC
should be reduced.
General PCB design guidelines
Power supply decoupling should be performed as shown in Figure 34 or Figure 35,
depending on whether V
REF+
is connected to V
DDA
or not. The 10 nF capacitors should be
ceramic (good quality). They should be placed them as close as possible to the chip.
E
O
E
G
1LSB
IDEAL
(1) Example of an actual transfer curve
(2) The ideal transfer curve
(3) End point correlation line
E
T
=Total Unadjusted Error: maximum deviation
between the actual and the ideal transfer curves.
E
O
=Offset Error: deviation between the first actual
transition and the first ideal one.
E
G
=Gain Error: deviation between the last ideal
transition and the last actual one.
E
D
=Differential Linearity Error: maximum deviation
between actual steps and the ideal one.
E
L
=Integral Linearity Error: maximum deviation
between any actual transition and the end point
correlation line.
4095
4094
4093
5
4
3
2
1
0
7
6
1234567
4093 4094 4095 4096
(1)
(2)
E
T
E
D
E
L
(3)
V
DDA
V
SSA
ai14395b
V
REF+
4096
(or depending on package)]
V
DDA
4096
[1LSB
IDEAL
=
ai14139d
STM32F10xxx
V
DD
AINx
I
L
±1 µA
0.6 V
V
T
R
AIN
(1)
C
parasitic
V
AIN
0.6 V
V
T
R
ADC
(1)
C
ADC
(1)
12-bit
converter
Sample and hold ADC
converter
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