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STP16NF06L 数据手册 - ST Microelectronics（意法半导体）
制造商:
ST Microelectronics（意法半导体）
分类:
MOS管
封装:
TO-220-3
描述:
STMICROELECTRONICS STP16NF06L.. 场效应管, MOSFET, N沟道, 60V, 16A, TO-220
Pictures:
3D模型
符号图
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产品图
页面导航:
封装尺寸在P9P10P11
标记信息在P9P10P11
技术参数、封装参数在P1
导航目录
STP16NF06L数据手册
Page:
of 12 Go
若手册格式错乱，请下载阅览PDF原文件
IRF1010EZ/S/L
2 www.irf.com
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.077mH,
R
G
= 25Ω, I
AS
= 51A, V
GS
=10V. Part not
recommended for use above this value.
I
SD
≤ 51A, di/dt ≤ 260A/µs, V
DD
≤ V
(BR)DSS
,
T
J
≤ 175°C.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
C
oss
eff. is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
Limited by T
Jmax
, see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
This value determined from sample failure population. 100%
tested to this value in production.
This is applied to D
2
Pak, when mounted on 1" square PCB
( FR-4 or G-10 Material ). For recommended footprint and
soldering techniques refer to application note #AN-994.
S
D
G
S
D
G
Static @ T
J
= 25°C (unless otherwise specified)
Parameter Min. T
y
p. Max. Units
V
(BR)DSS
Drain-to-Source Breakdown Volta
g
e60–––––– V
∆Β
V
DSS
/
∆
T
J
Breakdown Volta
g
e Temp. Coefficien
t
––– 0.058 ––– V/°C
R
DS(on)
Static Drain-to-Source On-Resistanc
e
––– 6.8 8.5
mΩ
V
GS(th)
Gate Threshold Volta
g
e 2.0 ––– 4.0 V
g
fs Forward Transconductance 200 ––– ––– S
I
DSS
Drain-to-Source Leaka
g
e Current ––– ––– 20
µ
A
––– ––– 250
I
GSS
Gate-to-Source Forward Leaka
g
e ––– ––– 200 nA
Gate-to-Source Reverse Leaka
g
e ––– ––– -200
Q
g
Total Gate Char
g
e ––– 58 86 nC
Q
gs
Gate-to-Source Char
g
e ––– 19 28
Q
gd
Gate-to-Drain ("Miller") Char
g
e ––– 21 32
t
d(on)
Turn-On Dela
y
Time ––– 19 ––– ns
t
r
Rise Time ––– 90 –––
t
d(off)
Turn-Off Dela
y
Time ––– 38 –––
t
f
Fall Time ––– 54 –––
L
D
Internal Drain Inductance ––– 4.5 ––– nH Between lead,
6mm (0.25in.)
L
S
Internal Source Inductance ––– 7.5 ––– from packa
g
e
and center of die contact
C
iss
Input Capacitance ––– 2810 ––– pF
C
oss
Output Capacitance ––– 420 –––
C
rss
Reverse Transfer Capacitance ––– 200 –––
C
oss
Output Capacitance ––– 1440 –––
C
oss
Output Capacitance ––– 320 –––
C
oss
eff.
Effective Output Capacitance ––– 510 –––
Diode Characteristics
Parameter Min. T
y
p. Max. Units
I
S
Continuous Source Current ––– ––– 84
(Body Diode) A
I
SM
Pulsed Source Current ––– ––– 340
(Body Diode)
c
V
SD
Diode Forward Voltage
––– ––– 1.3 V
t
rr
Reverse Recovery Time
––– 41 62 ns
Q
rr
Reverse Recover
y
Char
g
e ––– 54 81 nC
t
on
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Conditions
V
GS
= 0V, I
D
= 250µA
Reference to 25°C, I
D
= 1mA
V
GS
= 10V, I
D
= 51A
f
V
DS
= V
GS
, I
D
= 100µA
V
DS
= 60V, V
GS
= 0V
V
DS
= 60V, V
GS
= 0V, T
J
= 125°C
R
G
= 7.95
Ω
I
D
= 51A
V
DS
= 25V, I
D
= 51A
V
DD
= 30V
I
D
= 51A
V
GS
= 20V
V
GS
= -20V
T
J
= 25°C, I
F
= 51A, V
DD
= 30V
di/dt = 100A/
µ
s
f
T
J
= 25°C, I
S
= 51A, V
GS
= 0V
f
showing the
integral reverse
p-n junction diode.
MOSFET symbol
V
GS
= 0V
V
DS
= 25V
V
GS
= 0V, V
DS
= 48V, ƒ = 1.0MHz
Conditions
V
GS
= 0V, V
DS
= 0V to 48V
V
DS
= 48V
V
GS
= 10V
f
ƒ = 1.0MHz, See Fig. 5
V
GS
= 0V, V
DS
= 1.0V, ƒ = 1.0MHz
V
GS
= 10V
f
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