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TFP401A-EP 数据手册 - TI（德州仪器）
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TI（德州仪器）
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增强型产品 PanelBus DVI 接收器，165MHz、固定 HSYNC
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TFP401A-EP数据手册
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TFP401A-EP
www.ti.com
SLDS160A –MARCH 2009– REVISED JULY 2011
TI PanelBus™ DIGITAL RECEIVER
Check for Samples: TFP401A-EP
1
FEATURES
SUPPORTS DEFENSE, AEROSPACE,
AND MEDICAL APPLICATIONS
2
• Supports Pixel Rates Up to 165 MHz (including
1080p and WUXGA at 60Hz)
• Controlled Baseline
• Digital Visual Interface (DVI) Specification
• One Assembly/Test Site
Compliant
(1)
• One Fabrication Site
• True-Color, 24 Bit/Pixel, 16.7M Colors at One
• Available in Military (–55°C/125°C)
or Two Pixels Per Clock
Temperature Range (Custom temperature
• Laser Trimmed Internal Termination Resistors
ranges available)
for Optimum Fixed Impedance Matching
• Extended Product Life Cycle
• Skew Tolerant Up to One Pixel Clock Cycle
• Extended Product-Change Notification
• 4x Over-Sampling
• Product Traceability
• Reduced Power Consumption - 1.8 V Core
Operation With 3.3 V I/Os and Supplies
(2)
DESCRIPTION
• Reduced Ground Bounce Using
The Texas Instruments TFP401A is a TI PanelBus ™
Time-Staggered Pixel Outputs
flat panel display product, part of a comprehensive
• Low Noise and Power Dissipation Using TI
family of end-to-end DVI 1.0 compliant solutions.
PowerPAD™ Packaging
Targeted primarily at desktop LCD monitors and
digital projectors, the TFP401A finds applications in
• Advanced Technology Using TI 0.18-mm
any design requiring high-speed digital interface. The
EPIC-5™ CMOS Process
TFP401A supports display resolutions up to 1080p
• TFP401A Incorporates HSYNC Jitter
and WUXGA in 24-bit true color pixel format. The
Immunity
(3)
TFP401A offers design flexibility to drive one or two
pixels per clock, supports TFT or DSTN panels, and
provides an option for time staggered pixel outputs
for reduced ground bounce. PowerPAD™ advanced
packaging technology results in best of class power
(1) The Digital Visual Interface Specification, DVI, is an industry
dissipation, footprint, and ultra-low ground
standard developed by the Digital Display Working Group
inductance. The TFP401A combines PanelBus ™
(DDWG) for high-speed digital connection to digital displays.
circuit innovation with TI's advanced 0.18-mm
The TFP401A is compliant to the DVI Specification Rev. 1.0.
(2) The TFP401A has an internal voltage regulator that provides EPIC-5™ CMOS process technology, along with TI
the 1.8-V core power supply from the externally supplied
PowerPAD™ package technology to achieve a
3.3-V supplies.
reliable, low-powered, low-noise, high-speed digital
(3) The TFP401A incorporates additional circuitry to create a
interface solution.
stable HSYNC from DVI transmitters that introduce
undesirable jitter on the transmitted HSYNC signal.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2PanelBus, PowerPAD, EPIC-5 are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2009–2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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