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TFP401PZP 数据手册 - TI（德州仪器）
制造商:
TI（德州仪器）
分类:
接口芯片
封装:
TQFP-100
描述:
TEXAS INSTRUMENTS TFP401PZP 专用接口, DVI, 台式LCD监控器, 数字式投影仪, 3 V, 3.6 V, HTQFP, 100 引脚
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TFP401PZP数据手册
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TFP401
,
TFP401A
SLDS120F –MARCH 2000–REVISED FEBRUARY 2015
TFP401x TI PanelBus™ Digital Receiver
1 Features 2 Applications
1
• Supports Pixel Rates up to 165 MHz (Including
• High-Definition TV
1080p and WUXGA at 60 Hz)
• HD PC Monitors
• Digital Visual Interface (DVI) Specification
• Digital Video
Compliant
(1)
• HD Projectors
• True-Color, 24-Bit/Pixel, 16.7M Colors at 1 or 2
• DVI/HDMI Receivers (HDMI Video-Only)
Pixels per Clock
• Laser Trimmed Internal Termination Resistors for
3 Description
Optimum Fixed Impedance Matching
The Texas Instruments TFP401 and TFP401A are TI
• Skew Tolerant up to One Pixel-Clock Cycle
PanelBus™ flat-panel display products, part of a
comprehensive family of end-to-end DVI 1.0
• 4× Oversampling
compliant solutions. Targeted primarily at desktop
• Reduced Power Consumption – 1.8-V Core
LCD monitors and digital projectors, the
Operation With 3.3-V I/Os and Supplies
(2)
TFP401/401A finds applications in any design
• Reduced Ground Bounce Using Time-Staggered
requiring high-speed digital interface.
Pixel Outputs
The TFP401 and TFP401A supports display
• Low Noise and Good Power Dissipation Using TI
resolutions up to 1080p and WUXGA in 24-bit true-
PowerPAD™ Packaging
color pixel format. The TFP401/401A offers design
flexibility to drive one or two pixels per clock, supports
• Advanced Technology Using TI 0.18-µm EPIC-5
TFT or DSTN panels, and provides an option for
CMOS Process
time-staggered pixel outputs for reduced ground
• TFP401A Incorporates HSYNC Jitter Immunity
(3)
bounce.
(1) The Digital Visual Interface Specification, DVI, is an industry
standard developed by the Digital Display Working Group
Device Information
(1)
(DDWG) for high-speed digital connection to digital displays.
PART NUMBER PACKAGE BODY SIZE (NOM)
The TPF401 and TFP401A are compliant with the DVI
Specification Rev. 1.0.
TFP401
(2) The TFP401/401A has an internal voltage regulator that
HTQFP (100) 14.00 mm × 14.00 mm
TFP401A
provides the 1.8-V core power supply from the external 3.3-V
supplies.
(1) For all available packages, see the orderable addendum at
(3) The TFP401A incorporates additional circuitry to create a
the end of the datasheet.
stable HSYNC from DVI transmitters that introduce
undesirable jitter on the transmitted HSYNC signal.
TFP401 Diagram
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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