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TJA1051T118
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  • 引脚图在P4
  • 典型应用电路图在P12
  • 原理图在P3
  • 封装尺寸在P14P15
  • 型号编码规则在P3
  • 焊接温度在P16P17
  • 功能描述在P1P5
  • 技术参数、封装参数在P22
  • 应用领域在P22
TJA1051T118数据手册
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TJA1051 All information provided in this document is subject to legal disclaimers. © NXP N.V. 2016. All rights reserved.
Product data sheet Rev. 8 — 12 July 2016 6 of 24
NXP Semiconductors
TJA1051
High-speed CAN transceiver
7.1.3 Off mode
A LOW level on pin EN of TJA1051T/E selects Off mode. In Off mode the entire
transceiver is disabled, allowing the microcontroller to save power when CAN
communication is not required. The bus pins are floating in Off mode, making the
transceiver invisible to the rest of the network.
7.2 Fail-safe features
7.2.1 TXD dominant time-out function
A ‘TXD dominant time-out’ timer is started when pin TXD is set LOW. If the LOW state on
pin TXD persists for longer than t
to(dom)TXD
, the transmitter is disabled, releasing the bus
lines to recessive state. This function prevents a hardware and/or software application
failure from driving the bus lines to a permanent dominant state (blocking all network
communications). The TXD dominant time-out timer is reset when pin TXD is set HIGH.
The TXD dominant time-out time also defines the minimum possible bit rate of 20 kbit/s.
7.2.2 Internal biasing of TXD, S and EN input pins
Pin TXD has an internal pull-up to V
IO
and pins S and EN (TJA1051T/E) have internal
pull-downs to GND. This ensures a safe, defined state in case one or more of these pins
is left floating.
7.2.3 Undervoltage detection on pins V
CC
and V
IO
Should V
CC
or V
IO
drop below their respective undervoltage detection levels (V
uvd(VCC)
and V
uvd (VIO)
; see Table 7), the transceiver will switch off and disengage from the bus
(zero load) until V
CC
and V
IO
have recovered.
7.2.4 Overtemperature protection
The output drivers are protected against overtemperature conditions. If the virtual junction
temperature exceeds the shutdown junction temperature, T
j(sd)
, the output drivers will be
disabled until the virtual junction temperature falls below T
j(sd)
and TXD becomes
recessive again. Including the TXD condition ensures that output driver oscillations due to
temperature drift are avoided.
7.3 V
IO
supply pin
There are three versions of the TJA1051 available, only differing in the function of a single
pin. Pin 5 is either an enable control input (EN), a V
IO
supply pin or is not connected.
Pin V
IO
on the TJA1051T/3 and TJA1051TK/3 should be connected to the microcontroller
supply voltage (see Figure 6
). This will adjust the signal levels of pins TXD, RXD and S to
the I/O levels of the microcontroller. For versions of the TJA1051 without a V
IO
pin, the V
IO
input is internally connected to V
CC
. This sets the signal levels of pins TXD, RXD and S to
levels compatible with 5 V microcontrollers.

TJA1051T118 数据手册

NXP(恩智浦)
24 页 / 0.21 MByte

TJA1051 数据手册

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