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TMS320VC5402PGE100
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TMS320VC5402PGE100数据手册
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SPRS079G − OCTOBER 1998 − REVISED OCTOBER 2008
2
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
TABLE OF CONTENTS
Description 3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Assignments 6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Terminal Functions 7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Memory 12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
On-Chip Peripherals 16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Software-Programmable Wait-State Generator 16. . . . . . . . .
Programmable Bank-Switching Wait States 18. . . . . . . . . . . .
Parallel I/O Ports 19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Enhanced 8-Bit Host-Port Interface 19. . . . . . . . . . . . . . . . . . .
Multichannel Buffered Serial Ports 20. . . . . . . . . . . . . . . . . . . .
Hardware Timer 21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clock Generator 21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DMA Controller 23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Memory-Mapped Registers 27. . . . . . . . . . . . . . . . . . . . . . . . . .
McBSP Control Registers And Subaddresses 29. . . . . . . . . .
DMA Subbank Addressed Registers 29. . . . . . . . . . . . . . . . . .
Interrupts 31. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Support 33. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Maximum Ratings 35. . . . . . . . . . . . . . . . . . . . . . . . . .
Recommended Operating Conditions 35. . . . . . . . . . . . . . . . .
Electrical Characteristics 36. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Parameter Measurement Information 37. . . . . . . . . . . . . . . . . .
Internal Oscillator With External Crystal 37. . . . . . . . . . . . . . . .
Divide-By-Two Clock Option (PLL Disabled) 38. . . . . . . . . . . .
Multiply-By-N Clock Option 39. . . . . . . . . . . . . . . . . . . . . . . . . .
Memory and Parallel I/O Interface Timing 40. . . . . . . . . . . . . .
Ready Timing For Externally Generated Wait States 46. . . . .
HOLD
and HOLDA Timings 50. . . . . . . . . . . . . . . . . . . . . . . . . .
Reset, BIO
, Interrupt, and MP/MC Timings 51. . . . . . . . . . . . .
Instruction Acquisition (IAQ
), Interrupt Acknowledge
(IACK
), External Flag (XF), and TOUT Timings 53. . . . .
Multichannel Buffered Serial Port Timing 55. . . . . . . . . . . . . . .
HPI8 Timing 62. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mechanical Data 66. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
REVISION HISTORY
REVISION
DATE PRODUCT STATUS HIGHLIGHTS
* October 1998 Advanced Information Original
A April 1999 Advanced Information Revised to update characteristic data
B July 1999 Advanced Information Revised to update characteristic data
C September 1999 Advanced Information Revised to update characteristic data
D January 2000 Production Data Revised to release production data.
E August 2000 Production Data
Added Table of Contents, Revision History, and corrected IDLE3
current on page 35.
F February 2005 Production Data
Updated table of contents and revision history. Added notices con-
cerning JTAG (IEEE 1149.1) boundary scan test capability and re-
placed document support section on page 33. Added device and
development-support tool nomenclature section on page 34. Re-
placed Figure 9 on page 37. Replaced Figure 36 on page 65. Re-
placed mechanical section on page 66.
G October 2008 Production Data
Terminal Functions table:
Updated DESCRIPTION of TRST
Added footnote about TRST
Mechanical Data section:
Revised paragraph
Mechanical drawings will be appended to this document via an
automated process

TMS320VC5402PGE100 数据手册

TI(德州仪器)
72 页 / 1 MByte
TI(德州仪器)
72 页 / 1.38 MByte
TI(德州仪器)
1 页 / 0.16 MByte

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