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TPS24750EVM-546 数据手册 - TI（德州仪器）
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TPS24750EVM-546数据手册
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TPS24750
,
TPS24751
SLVSC87A –OCTOBER 2013–REVISED SEPTEMBER 2015
www.ti.com
7.5 Electrical Characteristics
–40°C ≤ T
J
≤ 125°C, V
CC
= 12 V, V
EN
= 3 V, R
SET
= 191 Ω, R
IMON
= 5 kΩ, and R
PROG
= 50 kΩ to GND. All voltages referenced
to GND, unless otherwise noted.
PARAMETER CONDITIONS MIN NOM MAX UNIT
VCC
UVLO threshold, rising 2.20 2.32 2.45 V
UVLO threshold, falling 2.10 2.22 2.35 V
UVLO hysteresis
(1)
0.1 V
Enabled ― I
OUT
+ I
VCC
+ I
SENSE
0.5 1 1.4 mA
Supply current
Disabled
(1)
― EN = 0 V, I
OUT
+ I
VCC
+ I
SENSE
0.45 mA
OUT
1 A ≤ I
OUT
≤ 10 A at T
J
= 25°C 3 3.5 mΩ
R
ON
On-resistance
1 A ≤ I
OUT
≤ 10 A at T
J
=125°C 5 6 mΩ
Input bias current V
OUT
= 12 V 10 16 30 µA
Diode Forward Voltage V
EN
= 0V, I
OUT
= –100 mA, V
OUT
> V
SENSE
0.8 1 V
V
EN
= 0V, V
OUT
= 0 V, V
DRAIN
= 18 V at 25°C 0 1 µA
Leakage Current - DRAIN to OUT
V
EN
= 0V, V
OUT
= 0 , V
DRAIN
= 18 V at 125°C 2 5 µA
C
iss
Input Capacitance 2710 3250 pF
C
oss
Output Capacitance V
GS
= 0V, V
DRAIN-OUT
= 15V, f = 1 MHz 635 762 pF
C
rss
Reverse Transfer Capacitance 48 60 pF
Q
g
Gate Charge Total (4.5V) 17.5 21.5 nC
V
DRAIN-OUT
= 15V, I
OUT
= 20 A
Qg(th) Gate Charge at Vth 4.1 nC
EN
Threshold voltage, falling 1.2 1.3 1.4 V
Hysteresis
(1)
50 mV
Input leakage current 0 V ≤ V
EN
≤ 30 V –1 0 1 µA
Turnoff time EN ↓ to V
GATE
< 1 V 3 8 25 µs
Deglitch time EN ↑ 8 14 21 µs
Disable delay EN ↓ to GATE ↓, C
GATE
= 0, t
pff50–90
, See Figure 28 0.1 0.4 1.8 µs
Turn-On Delay C
OUT
= 2.2 uF, V
EN
↑ to V
OUT
↑, V
EN
: 0 V to 3 V, V
OUT
: 90% V
CC
800 µs
OV
Threshold voltage, rising 1.25 1.35 1.45 V
Hysteresis
(1)
60 mV
Input leakage current 0 V ≤ V
OV
≤ 30 V –1 0 1 µA
Deglitch time OV rising 0.5 1.2 1.5 µs
FLTb
Output low voltage Sinking 2 mA 0.11 0.25 V
Input leakage current V
FLTb
= 0 V, 30 V –1 0 1 µA
PGb
Threshold V
(SENSE – OUT)
rising, PGb going high 140 220 340 mV
Hysteresis
(1)
Measured V
(SENSE – OUT)
falling, PGb going low 70 mV
Output low voltage Sinking 2 mA 0.11 0.25 V
Input leakage current V
PGb
= 0 V, 30 V –1 0 1 µA
Delay (deglitch) time Rising or falling edge 2 3.4 6 ms
PROG
Bias voltage Sourcing 10 µA 0.65 0.675 0.7 V
Input leakage current V
PROG
= 1.5 V –0.2 0 0.2 µA
TIMER
Sourcing current V
TIMER
= 0 V 8 10 12 µA
V
TIMER
= 2 V 8 10 12 µA
Sinking current
V
EN
= 0 V, V
TIMER
= 2 V 2 4.5 7 mA
Upper threshold voltage 1.3 1.35 1.4 V
(1) These parameters are provided for reference only and do not constitute part of TI’s published device specifications for purposes of TI’s
product warranty.
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