Datasheet 搜索 > 接口芯片 > NXP（恩智浦） > SGTL5000XNAA3 数据手册 > SGTL5000XNAA3 产品设计参考手册 1/33 页
器件3D模型￥ 19.932
SGTL5000XNAA3 产品设计参考手册 - NXP（恩智浦）
制造商:
NXP（恩智浦）
分类:
接口芯片
封装:
QFN-32
描述:
NXP SGTL5000XNAA3 音频编解码器, 耳机, 立体声, 1, 1, -40 °C, 85 °C, 96 kSPS
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
封装尺寸在P2P3P8P26P27
焊盘布局在P8
封装信息在P26P30P31
焊接温度在P17P20P22
导航目录
SGTL5000XNAA3数据手册
Page:
of 33 Go
若手册格式错乱，请下载阅览PDF原文件
Freescale Semiconductor, Inc.
Application Note
© Freescale Semiconductor, Imnc., 2013 - 2014. All rights reserved.
Document Number: AN1902
Rev. 7.0, 9/2014
Contents
1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Scope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 DFN and QFN Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
4 Printed Circuit Board Guidelines . . . . . . . . . . . . . . . . . . . . . 8
5 Board Assembly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6 Repair and Rework Procedure . . . . . . . . . . . . . . . . . . . . . . 19
7 Board Level Reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
8 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
9 Case Outline Drawing, MCDS and MSL Rating . . . . . . . . 26
10 Package Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
11 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
12 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
1 Introduction
This application note provides guidelines for the handling and
assembly of Freescale QFN and DFN packages during printed
circuit board (PCB) assembly, and guidelines for PCB design and
rework, and package performance information (such as Moisture
Sensitivity Level rating, board level reliability, mechanical and
thermal resistance data).
2 Scope
Contains generic information for various Freescale QFN and DFN
packages assembled internally (or at external subcontractors).
Specific information about each device is not provided. To develop
a specific solution, actual experience and development efforts are
required to optimize the assembly process and application design
per individual device requirements, industry standards (such as
IPC and JEDEC), and prevalent practices in the assembly
environment. For more details about the specific devices contained
in this note, visit
www.freescale.com or contact the appropriate
product application team.
Assembly Guidelines for QFN (Quad Flat No-lead) and
DFN (Dual Flat No-lead) Packages
器件 Datasheet 文档搜索
AiEMA 数据库涵盖高达 72,405,303 个元件的数据手册，每天更新 5,000 多个 PDF 文件
