Datasheet 搜索 > 微控制器 > Microchip（微芯） > PIC24FJ64GA004-I/PT 数据手册 > PIC24FJ64GA004-I/PT 用户编程技术手册 3/52 页
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PIC24FJ64GA004-I/PT 用户编程技术手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
微控制器
封装:
TQFP-44
描述:
MICROCHIP PIC24FJ64GA004-I/PT 微控制器, 16位, 通用, PIC24FJ, 32 MHz, 64 KB, 8 KB, 44 引脚, TQFP
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PIC24FJ64GA004-I/PT数据手册
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© 2008 Microchip Technology Inc. DS39768D-page 3
PIC24FJXXXGA0XX
2.2 Program Memory Write/Erase
Requirements
The Flash program memory on the PIC24FJXXXGA0XX
devices has a specific write/erase requirement that must
be adhered to for proper device operation. The rule is
that any given word in memory must not be written more
than twice before erasing the page in which it is located.
Thus, the easiest way to conform to this rule is to write
all the data in a programming block within one write
cycle. The programming methods specified in this
specification comply with this requirement.
2.3 Pin Diagrams
The pin diagrams for the PIC24FJXXXGA0XX family
are shown in the following figures. The pins that are
required for programming are listed in Table 2-1 and
are shown in bold letters in the figures. Refer to the
appropriate device data sheet for complete pin
descriptions.
TABLE 2-1: PIN DESCRIPTIONS (DURING PROGRAMMING)
Note: Writing to a location multiple times without
erasing is not recommended.
Pin Name
During Programming
Pin Name Pin Type Pin Description
MCLR MCLR P Programming Enable
ENVREG ENVREG I Enable for On-Chip Voltage Regulator
DISVREG
(1)
DISVREG I Disable for On-Chip Voltage Regulator
VDD and AVDD
(2)
VDD P Power Supply
VSS and AVSS
(2)
VSS PGround
V
DDCORE VDDCORE P Regulated Power Supply for Core
PGC1 PGC I Primary Programming Pin Pair: Serial Clock
PGD1 PGD I/O Primary Programming Pin Pair: Serial Data
PGC2 PGC I Secondary Programming Pin Pair: Serial Clock
PGD2 PGD I/O Secondary Programming Pin Pair: Serial Data
Legend: I = Input, O = Output, P = Power
Note 1: Applies to 28 and 44-pin devices only.
2: All power supply and ground pins must be connected, including analog supplies (AV
DD) and ground
(AV
SS).
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