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IDT7006S35PF 数据手册 - Integrated Device Technology（艾迪悌）
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Integrated Device Technology（艾迪悌）
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存储芯片
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LQFP
描述:
高速16K ×8双端口静态RAM HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM
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IDT7006S35PF数据手册
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IDT7006S/L
HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM MILITARY AND COMMERCIAL TEMPERATURE RANGES
6.07 5
DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE
(VCC = 5.0V ± 10%)
IDT7006S IDT7006L
Symbol Parameter Test Conditions Min. Max. Min. Max. Unit
|I
LI| Input Leakage Current
(1)
VCC = 5.5V, VIN = 0V to VCC —10—5µA
|I
LO| Output Leakage Current
CE
= VIH, VOUT = 0V to VCC —10—5µA
V
OL Output Low Voltage IOL = 4mA — 0.4 — 0.4 V
V
OH Output High Voltage IOH = -4mA 2.4 — 2.4 — V
2739 tbl 08
DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE
(1)
(VCC = 5.0V ± 10%)
7006X15 7006X17 7006X20 7006X25
Test
Com'l. Only Com'l. Only
Symbol Parameter Condition Version
Typ.
(2)
Max.
Typ.
(2)
Max. Typ.
(2)
Max. Typ.
(2)
Max.
Unit
I
CC Dynamic Operating
CE
= VIL, Outputs Open MIL. S — — — — 160 370 155 340 mA
Current
SEM
= V
IH L — — — — 150 320 145 280
(Both Ports Active) f = f
MAX
(3)
COM.
S 170 310 170 310 160 290 155 265
L 160 260 160 260 150 240 145 220
I
SB1 Standby Current
CE
L =
CE
R = VIH MIL. S — — — — 20 90 16 80 mA
(Both Ports — TTL
SEM
R =
SEM
L = VIH L — — — — 10 70 10 65
Level Inputs f = f
MAX
(3)
COM.
S 20 60 20 60 20 60 16 60
L 10 50 10 50 10 50 10 50
I
SB2 Standby Current
CE
"A"=VIL and
CE
"B"=VIH
(5)
MIL. S — — — — 95 240 90 215 mA
(One Port — TTL Active Port Outputs Open
L — — — — 85 210 80 180
Level Inputs) f = f
MAX
(3)
COM.
S 105 190 105 190 95 180 90 170
SEM
R =
SEM
L > VIH L 95 160 95 160 85 150 80 140
I
SB3 Full Standby Current Both Ports
CE
L and MIL. S — — — — 1.0 30 1.0 30 mA
(Both Ports — All
CE
R > VCC - 0.2V L — — — — 0.2 10 0.2 10
CMOS Level Inputs) V
IN > VCC - 0.2V or
COM.
S 1.0 15 1.0 15 1.0 15 1.0 15
V
IN < 0.2V, f = 0
(4)
L 0.2 5 0.2 5 0.2 5 0.2 5
SEM
R =
SEM
L > VCC-0.2V
I
SB4 Full Standby Current
CE
"A" < 0.2V and MIL. S — — — — 90 225 85 200 mA
(One Port — All
CE
"B" > VCC - 0.2V
(5)
CMOS Level Inputs)
SEM
R =
SEM
L > VCC-0.2V L — — — — 80 200 75 170
V
IN > VCC - 0.2V or
COM
.S100 170 100 170 90 155 85 145
V
IN < 0.2v
Active Port Outputs Open,
L 90 140 90 140 80 130 75 120
f = f
MAX
(3)
NOTE:
1. At Vcc
≤ 2.0V input leakages are undefined.
NOTES: 2739 tbl 09
1. "X" in part numbers indicates power rating (S or L).
2. V
CC = 5V, TA = +25°C, and are not production tested. ICC DC = 120mA (typ.).
3. At f = f
MAX, address and I/O'S are cycling at the maximum frequency read cycle of 1/tRC, and using “AC Test Conditions” of input levels of GND to 3V.
4. f = 0 means no address or control lines change.
5. Port "A"may be either left or right port. Port "B" is the port opposite port "A".
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