Datasheet 搜索 > 微控制器 > TI（德州仪器） > LM3S6965-IQC50-A2T 数据手册 > LM3S6965-IQC50-A2T 数据手册 4/761 页
器件3D模型￥ 249.327
LM3S6965-IQC50-A2T 数据手册 - TI（德州仪器）
制造商:
TI（德州仪器）
分类:
微控制器
封装:
LQFP-100
描述:
的Stellaris LM3S6965微控制器 Stellaris LM3S6965 Microcontroller
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P160P172P336P396P433P476P514P551P599P612P650Hot
典型应用电路图在P47P610
原理图在P44P45P54P55P56P160P240P260P293P335P372P395
封装尺寸在P52P749P750P752P753P754P756P757P759P760
型号编码规则在P747
标记信息在P747P757P758
封装信息在P747P751P752P756P757P758P759P760
功能描述在P95P161P172P241P260P292P336P372P397P434P476P515
技术参数、封装参数在P699P701P702P703P705
应用领域在P44P58P179P761
电气规格在P52P700P702P704P706P708P710P712P714P716
导航目录
LM3S6965-IQC50-A2T数据手册
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2.5.4 Vector Table .................................................................................................................. 84
2.5.5 Exception Priorities ....................................................................................................... 85
2.5.6 Interrupt Priority Grouping .............................................................................................. 86
2.5.7 Exception Entry and Return ........................................................................................... 86
2.6 Fault Handling .............................................................................................................. 88
2.6.1 Fault Types ................................................................................................................... 89
2.6.2 Fault Escalation and Hard Faults .................................................................................... 89
2.6.3 Fault Status Registers and Fault Address Registers ........................................................ 90
2.6.4 Lockup ......................................................................................................................... 90
2.7 Power Management ...................................................................................................... 90
2.7.1 Entering Sleep Modes ................................................................................................... 91
2.7.2 Wake Up from Sleep Mode ............................................................................................ 91
2.8 Instruction Set Summary ............................................................................................... 92
3 Cortex-M3 Peripherals ........................................................................................... 95
3.1 Functional Description ................................................................................................... 95
3.1.1 System Timer (SysTick) ................................................................................................. 95
3.1.2 Nested Vectored Interrupt Controller (NVIC) .................................................................... 96
3.1.3 System Control Block (SCB) .......................................................................................... 98
3.1.4 Memory Protection Unit (MPU) ....................................................................................... 98
3.2 Register Map .............................................................................................................. 103
3.3 System Timer (SysTick) Register Descriptions .............................................................. 105
3.4 NVIC Register Descriptions .......................................................................................... 109
3.5 System Control Block (SCB) Register Descriptions ........................................................ 122
3.6 Memory Protection Unit (MPU) Register Descriptions .................................................... 149
4 JTAG Interface ...................................................................................................... 159
4.1 Block Diagram ............................................................................................................ 160
4.2 Signal Description ....................................................................................................... 160
4.3 Functional Description ................................................................................................. 161
4.3.1 JTAG Interface Pins ..................................................................................................... 161
4.3.2 JTAG TAP Controller ................................................................................................... 163
4.3.3 Shift Registers ............................................................................................................ 164
4.3.4 Operational Considerations .......................................................................................... 164
4.4 Initialization and Configuration ..................................................................................... 167
4.5 Register Descriptions .................................................................................................. 167
4.5.1 Instruction Register (IR) ............................................................................................... 167
4.5.2 Data Registers ............................................................................................................ 170
5 System Control ..................................................................................................... 172
5.1 Signal Description ....................................................................................................... 172
5.2 Functional Description ................................................................................................. 172
5.2.1 Device Identification .................................................................................................... 173
5.2.2 Reset Control .............................................................................................................. 173
5.2.3 Power Control ............................................................................................................. 177
5.2.4 Clock Control .............................................................................................................. 178
5.2.5 System Control ........................................................................................................... 183
5.3 Initialization and Configuration ..................................................................................... 184
5.4 Register Map .............................................................................................................. 185
5.5 Register Descriptions .................................................................................................. 186
July 15, 20144
Texas Instruments-Production Data
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