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LM3S6965-IQC50-A2T
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LM3S6965-IQC50-A2T数据手册
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9.3.2 32-Bit Timer Operating Modes ...................................................................................... 337
9.3.3 16-Bit Timer Operating Modes ...................................................................................... 338
9.4 Initialization and Configuration ..................................................................................... 342
9.4.1 32-Bit One-Shot/Periodic Timer Mode ........................................................................... 342
9.4.2 32-Bit Real-Time Clock (RTC) Mode ............................................................................. 343
9.4.3 16-Bit One-Shot/Periodic Timer Mode ........................................................................... 343
9.4.4 16-Bit Input Edge Count Mode ..................................................................................... 344
9.4.5 16-Bit Input Edge Timing Mode .................................................................................... 344
9.4.6 16-Bit PWM Mode ....................................................................................................... 345
9.5 Register Map .............................................................................................................. 345
9.6 Register Descriptions .................................................................................................. 346
10 Watchdog Timer ................................................................................................... 371
10.1 Block Diagram ............................................................................................................ 372
10.2 Functional Description ................................................................................................. 372
10.3 Initialization and Configuration ..................................................................................... 373
10.4 Register Map .............................................................................................................. 373
10.5 Register Descriptions .................................................................................................. 374
11 Analog-to-Digital Converter (ADC) ..................................................................... 395
11.1 Block Diagram ............................................................................................................ 395
11.2 Signal Description ....................................................................................................... 396
11.3 Functional Description ................................................................................................. 397
11.3.1 Sample Sequencers .................................................................................................... 397
11.3.2 Module Control ............................................................................................................ 397
11.3.3 Hardware Sample Averaging Circuit ............................................................................. 398
11.3.4 Analog-to-Digital Converter .......................................................................................... 398
11.3.5 Differential Sampling ................................................................................................... 399
11.3.6 Test Modes ................................................................................................................. 401
11.3.7 Internal Temperature Sensor ........................................................................................ 401
11.4 Initialization and Configuration ..................................................................................... 402
11.4.1 Module Initialization ..................................................................................................... 402
11.4.2 Sample Sequencer Configuration ................................................................................. 402
11.5 Register Map .............................................................................................................. 403
11.6 Register Descriptions .................................................................................................. 404
12 Universal Asynchronous Receivers/Transmitters (UARTs) ............................. 432
12.1 Block Diagram ............................................................................................................ 433
12.2 Signal Description ....................................................................................................... 433
12.3 Functional Description ................................................................................................. 434
12.3.1 Transmit/Receive Logic ............................................................................................... 434
12.3.2 Baud-Rate Generation ................................................................................................. 435
12.3.3 Data Transmission ...................................................................................................... 435
12.3.4 Serial IR (SIR) ............................................................................................................. 436
12.3.5 FIFO Operation ........................................................................................................... 437
12.3.6 Interrupts .................................................................................................................... 437
12.3.7 Loopback Operation .................................................................................................... 438
12.3.8 IrDA SIR block ............................................................................................................ 439
12.4 Initialization and Configuration ..................................................................................... 439
12.5 Register Map .............................................................................................................. 440
12.6 Register Descriptions .................................................................................................. 441
July 15, 20146
Texas Instruments-Production Data
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LM3S6965-IQC50-A2T 数据手册

TI(德州仪器)
761 页 / 4.64 MByte
TI(德州仪器)
761 页 / 5.41 MByte
TI(德州仪器)
11 页 / 0.32 MByte

LM3S6965IQC50A2 数据手册

TI(德州仪器)
TEXAS INSTRUMENTS  LM3S6965-IQC50-A2  微控制器, 32位, ARM 皮质-M3, 50 MHz, 256 KB, 64 KB, 100 引脚, LQFP
TI(德州仪器)
的Stellaris LM3S6965微控制器 Stellaris LM3S6965 Microcontroller
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