Datasheet 搜索 > 微控制器 > TI（德州仪器） > LM3S6965-IQC50-A2T 数据手册 > LM3S6965-IQC50-A2T 数据手册 5/761 页
器件3D模型￥ 249.791
LM3S6965-IQC50-A2T 数据手册 - TI（德州仪器）
制造商:
TI（德州仪器）
分类:
微控制器
封装:
LQFP-100
描述:
的Stellaris LM3S6965微控制器 Stellaris LM3S6965 Microcontroller
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P160P172P336P396P433P476P514P551P599P612P650Hot
典型应用电路图在P47P610
原理图在P44P45P54P55P56P160P240P260P293P335P372P395
封装尺寸在P52P749P750P752P753P754P756P757P759P760
型号编码规则在P747
标记信息在P747P757P758
封装信息在P747P751P752P756P757P758P759P760
功能描述在P95P161P172P241P260P292P336P372P397P434P476P515
技术参数、封装参数在P699P701P702P703P705
应用领域在P44P58P179P761
电气规格在P52P700P702P704P706P708P710P712P714P716
导航目录
LM3S6965-IQC50-A2T数据手册
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6 Hibernation Module .............................................................................................. 239
6.1 Block Diagram ............................................................................................................ 240
6.2 Signal Description ....................................................................................................... 240
6.3 Functional Description ................................................................................................. 241
6.3.1 Register Access Timing ............................................................................................... 241
6.3.2 Clock Source .............................................................................................................. 242
6.3.3 Battery Management ................................................................................................... 243
6.3.4 Real-Time Clock .......................................................................................................... 243
6.3.5 Battery-Backed Memory .............................................................................................. 244
6.3.6 Power Control ............................................................................................................. 244
6.3.7 Initiating Hibernate ...................................................................................................... 244
6.3.8 Interrupts and Status ................................................................................................... 245
6.4 Initialization and Configuration ..................................................................................... 245
6.4.1 Initialization ................................................................................................................. 245
6.4.2 RTC Match Functionality (No Hibernation) .................................................................... 245
6.4.3 RTC Match/Wake-Up from Hibernation ......................................................................... 246
6.4.4 External Wake-Up from Hibernation .............................................................................. 246
6.4.5 RTC/External Wake-Up from Hibernation ...................................................................... 246
6.5 Register Map .............................................................................................................. 246
6.6 Register Descriptions .................................................................................................. 247
7 Internal Memory ................................................................................................... 260
7.1 Block Diagram ............................................................................................................ 260
7.2 Functional Description ................................................................................................. 260
7.2.1 SRAM Memory ............................................................................................................ 260
7.2.2 Flash Memory ............................................................................................................. 261
7.3 Flash Memory Initialization and Configuration ............................................................... 263
7.3.1 Flash Programming ..................................................................................................... 263
7.3.2 Nonvolatile Register Programming ............................................................................... 264
7.4 Register Map .............................................................................................................. 265
7.5 Flash Register Descriptions (Flash Control Offset) ......................................................... 266
7.6 Flash Register Descriptions (System Control Offset) ...................................................... 274
8 General-Purpose Input/Outputs (GPIOs) ........................................................... 287
8.1 Signal Description ....................................................................................................... 287
8.2 Functional Description ................................................................................................. 292
8.2.1 Data Control ............................................................................................................... 293
8.2.2 Interrupt Control .......................................................................................................... 294
8.2.3 Mode Control .............................................................................................................. 295
8.2.4 Commit Control ........................................................................................................... 295
8.2.5 Pad Control ................................................................................................................. 295
8.2.6 Identification ............................................................................................................... 296
8.3 Initialization and Configuration ..................................................................................... 296
8.4 Register Map .............................................................................................................. 297
8.5 Register Descriptions .................................................................................................. 299
9 General-Purpose Timers ...................................................................................... 334
9.1 Block Diagram ............................................................................................................ 335
9.2 Signal Description ....................................................................................................... 336
9.3 Functional Description ................................................................................................. 336
9.3.1 GPTM Reset Conditions .............................................................................................. 336
5July 15, 2014
Texas Instruments-Production Data
Stellaris
®
LM3S6965 Microcontroller
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