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LPC11U6x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet Rev. 1.3 — 7 September 2016 10 of 97
NXP Semiconductors
LPC11U6x
32-bit ARM Cortex-M0+ microcontroller
PIO0_6
23 29 44
[6]
I; PU IO PIO0_6 — General-purpose port 0 input/output 6.
- R — Reserved.
IO SSP0_SCK — Serial clock for SSP0.
- R_4 — Reserved.
PIO0_7
24 30 45
[5]
I; PU IO PIO0_7 — General-purpose port 0 input/output 7
(high-current output driver).
I U0_CTS
Clear To Send input for USART.
- R_5 — Reserved.
IO I2C1_SCL — I
2
C-bus clock input/output. This pin is not
open-drain.
PIO0_8
26 37 58
[6]
I; PU IO PIO0_8 — General-purpose port 0 input/output 8.
IO SSP0_MISO — Master In Slave Out for SSP0.
O CT16B0_MAT0 — Match output 0 for 16-bit timer 0.
- R_6 — Reserved.
PIO0_9
27 38 59
[6]
I; PU IO PIO0_9 — General-purpose port 0 input/output 9.
IO SSP0_MOSI — Master Out Slave In for SSP0.
O CT16B0_MAT1 — Match output 1 for 16-bit timer 0.
- R_7 — Reserved.
SWCLK/PIO0_10
28 39 60
[6]
I; PU IO SWCLK — Serial Wire Clock. SWCLK is enabled by
default on this pin. In boundary scan mode: TCK (Test
Clock).
IO PIO0_10 — General-purpose digital input/output pin.
IO SSP0_SCK — Serial clock for SSP0.
O CT16B0_MAT2 — 16-bit timer0 MAT2
TDI/PIO0_11
30 42 64
[3]
I; PU IO TDI — Test Data In for JTAG interface. In boundary scan
mode only.
IO PIO0_11 — General-purpose digital input/output pin.
AI ADC_9 — A/D converter, input channel 9.
O CT32B0_MAT3 — Match output 3 for 32-bit timer 0.
O U1_RTS
Request To Send output for USART1.
IO U1_SCLK — Serial clock input/output for USART1 in
synchronous mode.
TMS/PIO0_12
31 43 66
[3]
I; PU IO TMS — Test Mode Select for JTAG interface. In boundary
scan mode only.
IO PIO0_12 — General-purpose digital input/output pin.
AI ADC_8 — A/D converter, input channel 8.
I CT32B1_CAP0 — Capture input 0 for 32-bit timer 1.
I U1_CTS
Clear To Send input for USART1.
Table 3. Pin description
Pin functions are selected through the IOCON registers. See Table 2 for availability of USART3 and USART4 pin functions.
Symbol
LQFP48
LQFP64
LQFP100
Reset
state
[1]
Type Description of pin functions

LPC11U68JBD48K 数据手册

NXP(恩智浦)
97 页 / 1.47 MByte

LPC11U68JBD48 数据手册

NXP(恩智浦)
NXP(恩智浦)
NXP  LPC11U68JBD48E  微控制器, 32位, ARM 皮质-M0+, 50 MHz, 256 KB, 36 KB, 48 引脚, LQFP
NXP(恩智浦)
单片机(MCU/MPU/SOC) LPC11U68JBD48K LQFP-48(7x7)
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