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SST25VF016B-50-4I-S2AE 数据手册 - Microchip（微芯）
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SST25VF016B-50-4I-S2AE数据手册
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SST25VF016B
DS20005044C-page 4 2015 Microchip Technology Inc.
2.0 PIN DESCRIPTION
FIGURE 2-1: PIN ASSIGNMENTS
TABLE 2-1: PIN DESCRIPTION
Symbol Pin Name Functions
SCK Serial Clock To provide the timing of the serial interface.
Commands, addresses, or input data are latched on the rising edge of the clock
input, while output data is shifted out on the falling edge of the clock input.
SI Serial Data Input To transfer commands, addresses, or data serially into the device.
Inputs are latched on the rising edge of the serial clock.
SO Serial Data Output To transfer data serially out of the device.
Data is shifted out on the falling edge of the serial clock.
Outputs Flash busy status during AAI Programming when reconfigured as RY/BY#
pin. See
“Hardware End-of-Write Detection” on page 11 for details.
CE# Chip Enable The device is enabled by a high to low transition on CE#. CE# must remain low for
the duration of any command sequence.
WP# Write Protect The Write Protect (WP#) pin is used to enable/disable BPL bit in the status register.
HOLD# Hold To temporarily stop serial communication with SPI flash memory without resetting the
device.
V
DD
Power Supply To provide power supply voltage: 2.7-3.6V for SST25VF016B
V
SS
Ground
1
2
3
4
8
7
6
5
CE#
SO
WP#
V
SS
V
DD
HOLD#
SCK
SI
Top View
1271 08-soic S2A P1.0
1
2
3
4
8
7
6
5
CE#
SO
WP#
V
SS
Top View
V
DD
HOLD#
SCK
SI
1271 08-wson QA P2.0
8-Lead SOIC
8-Contact WSON
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