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STM32L051K8 数据手册 - ST Microelectronics（意法半导体）
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STM32L051K8数据手册
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STM32L051x6/8 silicon limitations STM32L051x6/8
6/21 DocID026274 Rev 5
2 STM32L051x6/8 silicon limitations
Table 3 gives quick references to all documented limitations.
Legend for Table 3: A = workaround available; N = no workaround available; P = partial
workaround available, ‘-’ and grayed = fixed.
Table 3. Summary of silicon limitations
Links to silicon limitations
Revision A
(samples)
Revision
Z
Revision
Y
Revision
X
Section 2.1: System
limitations
Section 2.1.1: Writing in byte mode to the
GPIOx_OTYPER register does not work
A AAA
Section 2.1.2: Exiting Stop mode on a reset
event is not possible when HSI16 is the clock
system and it is selected as wakeup clock
A
- - -
Section 2.1.3: Protection level1 does not work N
- - -
Section 2.1.4: LSE bypass feature cannot be
used in Standby mode
N - - -
Section 2.1.5: PA4 and PA5 cannot be
redirected to comparator 2 minus input
N
- - -
Section 2.1.6: PB14 output speed
configuration interferes with PB13
N
- - -
Section 2.1.7: ADC transfer curve issue at
VREF+/2 when VREF+ < VDDA
N
- - -
Section 2.1.8: Delay after an RCC peripheral
clock enabling
A AAA
Section 2.1.9: Flash memory wakeup issue
when waking up from Stop or Sleep with
Flash in power-down mode
AA
- -
Section 2.1.10: Unexpected system reset
when waking up from Stop mode with
regulator in low-power mode
AA
- -
Section 2.1.11: I2C and USART cannot wake
up the device from Stop mode
NNN
-
Section 2.1.12: LDM, STM, PUSH and POP
not allowed in IOPORT bus
NNNN
Section 2.1.13: BOOT_MODE bits do not
reflect the selected boot mode
NNN
-
Section 2.2: ADC
peripheral limitation
Section 2.2.1: Incorrect first ADC conversion
result when delay between two consecutive
conversions is too long
AA- -
Section 2.2.2: Overrun flag might not be set
when converted data have not been read
before new data are written
A AAA
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