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TSB12LV21B-EP
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TSB12LV21B-EP数据手册
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1
FEATURES
DESCRIPTION
TSB12LV21B-EP
www.ti.com
...................................................................................................................................................................................................... SLLA274 APRIL 2008
(PCILynx-2) IEEE 1394 LINK LAYER CONTROLLER
Controlled Baseline 3.3-V Core Logic While Maintaining
5-V Tolerant Inputs
One Assembly Site
Performs the Function of 1394 Cycle Master
One Test Site
Provides 4 KBytes of Configurable FIFO RAM
One Fabrication Site
Provides Five Scatter-Gather DMA Channels
Extended Temperature Performance of
55 ° C to 125 ° C Provides Software Control of Interrupt Events
Enhanced Diminishing Manufacturing Sources Provides Four General-Purpose Input/Outputs
(DMS) Support
Supports Plug-and-Play (PnP) Specification
Enhanced Product-Change Notification
Generates 32-Bit CRC for Transmission of
Qualification Pedigree
(1)
1394 Packets
IEEE Standard for 1394-1995 Compliant Performs 32-Bit CRC Checking on Reception
of 1394 Packets
IEEE Standard for 1212-1991 Compliant
Provides PCI Bus Master Function for
Supports IEEE 1394-1995 Link Layer Control
Supporting DMA Operations
PCI Local Bus Specification Rev. 2.1
Provides PCI Slave Function for Read/Write
Compliant
Access of Internal Registers
Supports IEEE 1394 Transfer Rates of 100,
Supports Distributed DMA Transfers Between
200, and 400 Mbit per Second
1394 and Local Bus RAM, ROM, AUX, or
(1) Component qualification in accordance with JEDEC and
Zoomed Video
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
Advanced Submicron, Low-Power CMOS
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
Technology
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
Packaged in a 176-Pin PQFP (PGF)
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
The TSB12LV21B (PCILynx-2) provides a high-performance IEEE 1394-1995 interface with the capability to
transfer data between the 1394 PHY-link interface, the PCI bus interface, and external devices connected to the
local bus interface. The 1394 PHY-link interface provides the connection to the 1394 physical layer device; it is
supported by the onboard link layer controller (LLC). The LLC provides the control for transmitting and receiving
1394 packet data between the FIFO and PHY-link interface at rates of 100 Mbit/s, 200 Mbit/s, and 400 Mbit/s.
The link layer also provides the capability to receive status from the physical layer device and to access the
physical layer control and status registers by the application software. The PCILynx-2 complies with
PCI Local Bus Specification, Revision 2.1
IEEE Standard for a 1394-1995 High Performance Serial Bus
IEEE Standard 1212-1991
IEEE Standard Control and Status Register (CSR) Architecture for Microcomputer Buses
An internal 4 Kbyte memory can be configured as multiple variable-size FIFOs, eliminating the need for external
FIFOs. Separate FIFOs are user configurable to support 1394 receive, asynchronous transmit, and
isosynchronous transmit transfer operations.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2008, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
On products compliant to MIL-PRF-38535, all parameters are
Instruments standard warranty. Production processing does not
tested unless otherwise noted. On all other products, production
necessarily include testing of all parameters.
processing does not necessarily include testing of all parameters.

TSB12LV21B-EP 数据手册

TI(德州仪器)
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TSB12LV21 数据手册

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PCILynx - 1394 至 PCI 链路层控制器
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IEEE 1394链路层控制器 IEEE 1394 LINK LAYER CONTROLLER
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( PCILynx - 2 ), IEEE 1394链路层控制器 (PCILynx-2) IEEE 1394 LINK LAYER CONTROLLER
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IEEE1394- 1995总线到PCI总线接口 IEEE 1394-1995 BUS TO PCI BUS INTERFACE
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